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Ansuya P Bhatt

from Cupertino, CA
Age ~69
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Also known as:
Ansuya Dr Bhatt, Anshu Bhatt, Anfuya P Bhatt, Ausuya Bhatt, Amish Bhatt, Ap Bhatt, Akshay Bhatt
Phone and address:
20697 Hanford Dr, Cupertino, CA 95014
(408) 573-1937
Related to:
Veena BhattMarie TaylorThomas BrentMargaret Wohlfeil, 91Raquel Gonzalez, 85Martha Wohlfeil, 33
Connected to:
Adarsh Bhatt, 28Amy P Bhatt, 44Ankita Bhatt, 38Arohi Bhatt, 31Arpit P Bhatt, 43Avani K Bhatt, 55Bhavesh C Bhatt, 55Bhupendra J Bhatt, 66Chhaya B Bhatt, 65Chirantan H Bhatt, 58

Ansuya Bhatt Phones & Addresses

  • 20697 Hanford Dr, Cupertino, CA 95014 (408) 573-1937
  • New River, AZ
  • Rio Verde, AZ
  • 23839 N 59Th Ave, Glendale, AZ 85310
  • Layton, UT
  • San Jose, CA
  • Cincinnati, OH

Work

Company: Globalfoundries Feb 2017 to Aug 2018 Position: Director program management

Education

Degree: Masters, Master of Technology School / High School: Indian Institute of Technology, Delhi

Skills

Analog • Ic • Mixed Signal • Semiconductors • Rf • Pll • Cmos • Semiconductor Industry • Analog Circuit Design • Engineering Management • Asic • Soc • Cross Functional Team Leadership • Testing • Power Management • Low Power Design • Dac • Sigma Delta Adc and Dac Design • Data Converters • Embedded Systems • Application Specific Integrated Circuits • Radio Frequency • System on A Chip • Integrated Circuits • System Engineering • Ic Bench Testing • Mobile Devices • Custom Asics • Fabless Design/ Verification

Industries

Semiconductors

Resumes

Resumes

Ansuya Bhatt Photo 1

Senior Director Analog Design

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Globalfoundries Feb 2017 - Aug 2018
Director Program Management
Qst Corp Feb 2017 - Aug 2018
Senior Director Analog Design
Design Consulting Gmbh 2015 - 2016
Mixed Signal and Soc Design
Knowles Intelligent Audio 2010 - 2014
Vice President Analog and Hardware Engineering
National Semiconductor 1997 - 2010
Senior Director Design , Analog Products
Education:
Indian Institute of Technology, Delhi
Masters, Master of Technology University at Buffalo
Doctorates, Doctor of Philosophy, Electrical Engineering, Engineering
Skills:
Analog
Ic
Mixed Signal
Semiconductors
Rf
Pll
Cmos
Semiconductor Industry
Analog Circuit Design
Engineering Management
Asic
Soc
Cross Functional Team Leadership
Testing
Power Management
Low Power Design
Dac
Sigma Delta Adc and Dac Design
Data Converters
Embedded Systems
Application Specific Integrated Circuits
Radio Frequency
System on A Chip
Integrated Circuits
System Engineering
Ic Bench Testing
Mobile Devices
Custom Asics
Fabless Design/ Verification

Publications

Us Patents

Apparatus And Method For Pop-And-Click Suppression With Fast Turn-On Time

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US Patent:
7164312, Jan 16, 2007
Filed:
Aug 2, 2004
Appl. No.:
10/910691
Inventors:
Raminder Jit Singh - San Jose CA, US
Ansuya P. Bhatt - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 1/02
US Classification:
330 9, 381 945
Abstract:
A circuit for audio amplification includes an amplifier and a first input resistor. The amplifier is arranged to provide an amplifier output signal that is based, in part, on a capacitively-coupled audio input signal. The capacitively-coupled audio input signal is based, in part, on an input RC value. The input RC value is given by the input capacitance times the input resistance. The input resistance is reduced during the turn-on in order to achieve a fast turn-on time with minimal pop-and-click noise. Also, the input resistance is increased to its normal value after the turn-on so that full audio fidelity is substantially maintained during normal operation.

Balanced, Floating, Spread-Spectrum Pulse Width Modulator Circuit

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US Patent:
7170266, Jan 30, 2007
Filed:
Jun 18, 2004
Appl. No.:
10/871735
Inventors:
Kazim Seven - San Jose CA, US
Ansuya P. Bhatt - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
G05F 1/40
H03F 3/217
H02M 1/12
US Classification:
323268, 330251
Abstract:
A fully differential class D amplifier includes a pulse width modulator and a power stage. The pulse width modulator is arranged to employ a differential output signal provided from the power stage as a feedback signal. The pulse width modulator includes a transimpedance amplifier that is arranged to generate a triangle wave from the input signal and the feedback signal. The transimpedance amplifier is arranged to generate the triangle wave such that the triangle wave that has approximately a 50% duty cycle when no input signal is applied. Additionally, the input signal adjusts the frequency of the triangle wave such that the triangle wave is a spread spectrum signal. The triangle wave is compared to a threshold signal to provide a pulse width modulated signal.

Apparatus And Method For A Class D Audio Power Amplifier With A Higher-Order Sigma-Delta Topology

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US Patent:
7170340, Jan 30, 2007
Filed:
Jan 25, 2005
Appl. No.:
11/043628
Inventors:
Ansuya P. Bhatt - Cupertino CA, US
Sumant Bapat - Santa Clara CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 3/38
US Classification:
330 10, 330251
Abstract:
A class D power amplifier is provided to drive a low impedance load for audio applications. The amplifier includes a sigma-delta modulator circuit including three or more integrators that are arranged for third or higher order sigma-delta modulation. Also, the sigma-delta modulator circuit includes a quantizer circuit that is arranged to provide a sigma-delta modulator output signal based on a three-level switching scheme. The class D power amplifier drives a speaker based on the three-level switching scheme so that the output switches between three levels: VDD, 0, and −VDD, based on the input signal.

Apparatus And Method For A Driver With An Adaptive Drive Strength For A Class D Amplifier

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US Patent:
7227390, Jun 5, 2007
Filed:
Jan 25, 2005
Appl. No.:
11/043797
Inventors:
Sumant Bapat - Santa Clara CA, US
Ansuya P. Bhatt - Cupertino CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 3/00
US Classification:
327108, 326 82, 326 83, 326 91, 327 80, 327 81
Abstract:
A circuit for adaptively adjusting the drive strength of output power transistors in a class D amplifier is provided. The circuit includes a driver circuit and a low-voltage detect circuit. The low-voltage detect circuit is arranged to assert a low-voltage detect signal if a low supply voltage condition is detected. The driver circuit is arranged to increase the drive strength if the low-voltage detect signal is asserted. The driver circuit includes a first driver and a second driver. The second driver is enabled if the low-voltage detect signal is asserted, and disabled if the low-voltage detect signal is unasserted.

Class D Audio Power Amplifier For Mobile Applications

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US Patent:
7463089, Dec 9, 2008
Filed:
Jul 28, 2006
Appl. No.:
11/460937
Inventors:
Sumant Bapat - Santa Clara CA, US
Ansuya Bhatt - Cupertino CA, US
Christopher B. Heithoff - Sunnyvale CA, US
Raminder Jit Singh - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 3/88
US Classification:
330 10, 330207 A
Abstract:
A fully differential class D amplifier is provided. The class D amplifier includes an active amplifier in the feedback path of the modulator. In one embodiment, the class D amplifier includes a fully differential amplifier as an input buffer, in which a supply-independent reference voltage is used as the common mode voltage of the output of the fully differential amplifier. In one embodiment, the class D amplifier includes a pulse width modulation circuit that includes rail-to-rail comparators.

Apparatus And Method For Asymmetric Charge Pump For An Audio Amplifier

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US Patent:
7554408, Jun 30, 2009
Filed:
May 21, 2007
Appl. No.:
11/751502
Inventors:
Huaijin Chen - Los Gatos CA, US
Marcellus Chen - Fremont CA, US
Ansuya P. Bhatt - Cupertino CA, US
Raminder Jit Singh - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 3/04
US Classification:
330297
Abstract:
An audio amplifier with an integrated asymmetric charge pump is provided. The audio amplifier receives VDD and VSS as power supply signals. The integrated charge pump is arranged to provide VSS from VDD, such that VSS is a negative voltage that is lower in magnitude than VDD.

Audio Amplifier Having An Input Stage With A Supply-Independent Reference Voltage

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US Patent:
7705671, Apr 27, 2010
Filed:
Jul 28, 2006
Appl. No.:
11/460931
Inventors:
Sumant Bapat - Santa Clara CA, US
Ansuya Bhatt - Cupertino CA, US
Christopher B. Heithoff - Sunnyvale CA, US
Raminder Jit Singh - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 3/38
H03F 3/45
US Classification:
330 10, 330258
Abstract:
An input stage for an audio power amplifier is provided. The input stage includes a fully differential amplifier and a supply-independent reference voltage generator. The supply-independent reference voltage generator provides a supply-independent reference voltage that is used as the common mode voltage of the output of the fully differential amplifier.

Apparatus And Method For Low Power Rail-To-Rail Operational Amplifier

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US Patent:
7714651, May 11, 2010
Filed:
Feb 1, 2008
Appl. No.:
12/024855
Inventors:
Sumant Bapat - Santa Clara CA, US
Ansuya P. Bhatt - Cupertino CA, US
Surya Sharma - Indore, IN
Gangaikondan Subramani Visweswaran - New Delhi, IN
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 3/45
US Classification:
330253
Abstract:
A rail-to-rail amplifier is provided. The rail-to-rail amplifier includes a p-type differential pair, an n-type differential pair, switches, and an output stage. The switches are arranged to selectively couple either the p-type differential pair or the n-type differential pair to the output stage so that only one of the differential pairs is coupled to the output stage at a time.
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Ansuya P Bhatt from Cupertino, CA, age ~69 Get Report