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Anjali K Vij

from Baton Rouge, LA
Age ~55

Anjali Vij Phones & Addresses

  • 12120 Lake Estates Ave, Baton Rouge, LA 70810 (225) 767-7679
  • 10724 Hillshire Ave, Baton Rouge, LA 70810
  • Stafford, TX
  • Mountain View, CA
  • Sunnyvale, CA
  • Austin, TX
  • Houston, TX

Work

Company: Chapman and Cutler LLP Address:

Specialities

Primary and Secondary Education • Governmental Revenue Bonds • School Districts • Bond Counsel • Double-Barreled Bonds • Libraries • Forest Preserve and Conservation Districts • Tax and Revenue Anticipation Notes and Warrants • Water, Sewer and Other Districts and Agencies • Fire Protection Districts • Leases, Installment Contracts and Debt Certificates • Townships • Special District Bonds • Sanitary Districts • Park Districts • Public Finance • General Obligation Bonds • Counties • Cities and Villages

Professional Records

Lawyers & Attorneys

Anjali Vij Photo 1

Anjali Vij - Lawyer

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Office:
Chapman and Cutler LLP
Specialties:
Primary and Secondary Education
Governmental Revenue Bonds
School Districts
Bond Counsel
Double-Barreled Bonds
Libraries
Forest Preserve and Conservation Districts
Tax and Revenue Anticipation Notes and Warrants
Water, Sewer and Other Districts and Agencies
Fire Protection Districts
Leases, Installment Contracts and Debt Certificates
Townships
Special District Bonds
Sanitary Districts
Park Districts
Public Finance
General Obligation Bonds
Counties
Cities and Villages
ISLN:
919012569
Admitted:
2006
University:
Northwestern University, B.A., 2003
Law School:
University of Notre Dame Law School, J.D., 2006

Business Records

Name / Title
Company / Classification
Phones & Addresses
Anjali Vij
MEAUX INVESTMENTS, LLC
12120 Lk Est Ave, Baton Rouge, LA 70810
C/O Mohit Vij, Baton Rouge, LA 70810

Publications

Us Patents

1149.1 Tap Linking Modules

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US Patent:
20130305108, Nov 14, 2013
Filed:
Jul 10, 2013
Appl. No.:
13/938793
Inventors:
Baher S. Haroun - Allen TX, US
Brian J. Lasher - Bellaire TX, US
Anjali Vij - Baton Rouge LA, US
International Classification:
G01R 31/3177
US Classification:
714727
Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

Input Linking Circuitry Connected To Test Mode Select And Enables

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US Patent:
8112684, Feb 7, 2012
Filed:
May 5, 2011
Appl. No.:
13/101730
Inventors:
Lee D. Whetsel - Parker TX, US
Baher S. Haroun - Allen TX, US
Brian J. Lasher - Bellaire TX, US
Anjali Vij - Baton Rouge LA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G01R 31/28
US Classification:
714729, 714727
Abstract:
IEEE 1149. 1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149. 1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149. 4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149. 1 instruction scan operations.

1149.1 Tap Linking Modules

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US Patent:
20190204383, Jul 4, 2019
Filed:
Mar 6, 2019
Appl. No.:
16/294408
Inventors:
- Dallas TX, US
Baher S. Haroun - Allen TX, US
Brian J. Lasher - Bellaire TX, US
Anjali Vij - Baton Rouge LA, US
International Classification:
G01R 31/3177
G01R 31/3185
G01R 31/317
Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

Third Tap Circuitry Controlling Linking First And Second Tap Circuitry

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US Patent:
20160231380, Aug 11, 2016
Filed:
Apr 21, 2016
Appl. No.:
15/134877
Inventors:
- Dallas TX, US
Baher S. Haroun - Allen TX, US
Brian J. Lasher - Bellaire TX, US
Anjali Vij - Baton Rouge LA, US
International Classification:
G01R 31/3177
G01R 31/317
Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

1149.1 Tap Linking Modules

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US Patent:
20140215282, Jul 31, 2014
Filed:
Mar 31, 2014
Appl. No.:
14/230771
Inventors:
- Dallas TX, US
Baher S. Haroun - Allen TX, US
Brian J. Lasher - Bellaire TX, US
Anjali Vij - Baton Rouge LA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G01R 31/3177
US Classification:
714727
Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
Anjali K Vij from Baton Rouge, LA, age ~55 Get Report