Inventors:
Thai Cheng Chua - Cupertino CA, US
Cory Czarnik - Saratoga CA, US
Andreas G. Hegedus - Burlingame CA, US
Christopher Sean Olsen - Fremont CA, US
Khaled Z. Ahmed - Anaheim CA, US
Philip Allan Kraus - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/336
H01L 21/8234
US Classification:
438197, 438770, 438775, 257E2117, 257E21311, 257E21284, 257E21293, 257E21632
Abstract:
A method for fabricating a gate dielectric of a field effect transistor is provided. In one embodiment, the method includes removing a native oxide layer, forming an oxide layer, forming a gate dielectric layer over the oxide layer, forming an oxide layer over the gate dielectric layer, and annealing the layers and underlying thermal oxide/silicon interface. Optionally, the oxide layer may be nitridized prior to forming the gate dielectric layer. In one embodiment, the oxide layer on the substrate is formed by depositing the oxide layer, and the oxide layer on the gate dielectric layer is formed by oxidizing at least a portion of the gate dielectric layer using an oxygen-containing plasma. In another embodiment, the oxide layer on the gate dielectric layer is formed by forming a thermal oxide layer, i. e. , depositing the oxide layer on the gate dielectric layer.