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Alexander R Bugeja

from The Colony, TX
Age ~51

Alexander Bugeja Phones & Addresses

  • The Colony, TX
  • Dallas, TX
  • Lewisville, TX
  • Cambridge, MA
  • San Diego, CA
  • Acton, MA
  • Framingham, MA
  • Champaign, IL
  • Schaumburg, IL

Publications

Us Patents

Analog To Digital Converter Circuit

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US Patent:
6445319, Sep 3, 2002
Filed:
May 10, 2000
Appl. No.:
09/569118
Inventors:
Alexander R. Bugeja - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03M 162
US Classification:
341138, 341155
Abstract:
An analog-to-digital converter (ADC) ( ) having a nonlinear transfer function with a unique mapping. The ADC ( ) is adapted to produce a digital output signal for a plurality of analog input signals, and a transfer function modifying circuit ( ) is coupled to the ADC circuit ( ). The transfer function modifying circuit ( ) is adapted to modify the ADC circuit ( ) transfer function ( ) to have a unique mapping. The ADC ( ) transfer function has multiple transfer function segments with varying slopes. Further disclosed is a method for designing an ADC ( ) having a nonlinear transfer function, and a method for calibrating an ADC ( ).

Compensation Techniques For Electronic Circuits

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US Patent:
6597299, Jul 22, 2003
Filed:
Apr 29, 2002
Appl. No.:
10/135186
Inventors:
Alexander Bugeja - Acton MA
Assignee:
Engim, Inc. - Acton MA
International Classification:
H03M 110
US Classification:
341122, 341120, 327 91
Abstract:
A sample and hold circuit including a capacitor is charged to a sample voltage from an open loop circuit such as a transistor circuit controlled by an input voltage. The sample voltage on the capacitor is converted to a digital signal via an ADC (Analog to Digital Converter). A digital correction circuit compensates for differences in voltage between the sample voltage on the capacitor and the input voltage based on properties of the open loop circuit and successive sample voltages on the capacitor. Consequently, nonlinearities can be compensated so that use of an open loop circuit or transistor circuit is less likely to negatively impact an overall accuracy of the ADC device.

Method For Implementing A Segmented Current-Mode Digital/Analog Converter With Matched Segment Time Constants

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US Patent:
6621439, Sep 16, 2003
Filed:
Apr 25, 2002
Appl. No.:
10/133246
Inventors:
Alexander Bugeja - Acton MA
Assignee:
Engim, Inc. - Acton MA
International Classification:
H03M 166
US Classification:
341145, 341153, 341144
Abstract:
A method for implementing segmented digital-analog converters (DACs) operating in the current mode matches the time constants in the most-significant-bit (MSB) segments to the time constants in the (LSB) least-significant-bit segments, and any intermediate-significant-bit (ISB) segments. The method can be implemented using the simple addition of capacitances or the resizing of transistors in the circuit at appropriate points. The resulting DAC exhibits high dynamic linearity and spurious free dynamic range (SFDR).

Method And Architecture For Varying Power Consumption Of A Current Mode Digital/Analog Converter In Proportion To Performance Parameters

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US Patent:
6650265, Nov 18, 2003
Filed:
Apr 25, 2002
Appl. No.:
10/133976
Inventors:
Alexander Bugeja - Acton MA
Assignee:
Engim, Inc. - Acton MA
International Classification:
H03M 120
US Classification:
341144, 341131, 341145
Abstract:
A method and circuit structure scale the power consumption of a current mode digital/analog converter (DAC) in proportion to performance parameters, such as sampling speed (i. e. , clock samples per second) and resolution (number of bits) under programmable control. In one embodiment, a current mode segmented DAC provided approaches the performance of custom implementations designed for specific combinations of these parameters, across a wide range of such parameters by varying current relative to the sampling rate and the resolution and by selectively enabling current sources in the DAC.

Circuit Architectures And Methods For A/D Conversion

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US Patent:
6661365, Dec 9, 2003
Filed:
Apr 29, 2002
Appl. No.:
10/135187
Inventors:
Alexander Bugeja - Acton MA
Assignee:
Engim, Incorporated - Acton MA
International Classification:
H03M 136
US Classification:
341160, 341158, 341157
Abstract:
An array of transistor circuits is fabricated so that each transistor circuit in an array of transistor circuits has a switching threshold determined by intrinsic switching thresholds of at least one sensing transistor in a corresponding transistor circuit. The sensing transistors in a set of transistor circuits of the array can be fabricated to have common physical dimensions even though corresponding intrinsic switching thresholds of the transistor circuits can vary. Switching thresholds of the transistor circuits can vary based on an applied well bias voltage. Alternatively, the switching threshold of each transistor circuit can be set to a common value and a tapped delay line can be coupled to the transistor circuits. Consequently, an A/D converter device can be fabricated by coupling an encoder, and a calibration circuit if necessary, to the output of the array of transistor circuits.

Circuit For Precise Measurement Of The Average Value Of The Outputs Of Multiple Circuit Unit Elements

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US Patent:
6804697, Oct 12, 2004
Filed:
Jul 13, 2001
Appl. No.:
09/905368
Inventors:
Alexander Bugeja - Dallas TX
Irfan A. Chaudhry - Plano TX
Mounir Fares - Richardson TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06G 712
US Classification:
708805
Abstract:
An averaging circuit includes: input signal nodes for providing input signals ; a multiplexing circuit coupled to the input signal nodes for switching between the input signals to create a time waveform; a low pass filter coupled to an output of the multiplexing circuit for filtering the time waveform to create an average signal; and an average replication circuit coupled to an output of the low pass filter.

High Dynamic Linearity Current-Mode Digital-To-Analog Converter Architecture

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US Patent:
6906652, Jun 14, 2005
Filed:
Sep 2, 2003
Appl. No.:
10/653710
Inventors:
Alexander Bugeja - Acton MA, US
Assignee:
Engim, Inc. - Acton MA
International Classification:
H03M001/66
H03M001/80
US Classification:
341145, 341153
Abstract:
The present invention dramatically reduces dynamic mismatches between the different current segments of a segmented current-mode DAC. By providing substantially the same local architecture for each of the individual current segments, parasitic effects of any physical realization can be controlled. In one embodiment, the most-significant-bit (MSB) current segments and the least-significant-bit (LSB) current segments each have the same number of multiple internal current branches. In the MSB segments, the multiple internal current branches are combined at a source node; whereas, in the LSB segment, a portion of the segment current is dumped, or wasted, through at least some of the internal current branches.

Segmented High Speed And High Resolution Digital-To-Analog Converter

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US Patent:
20020008651, Jan 24, 2002
Filed:
Jul 13, 2001
Appl. No.:
09/904990
Inventors:
Alexander Bugeja - Dallas TX, US
Irfan Chaudhry - Piano TX, US
Mounir Fares - Richardson TX, US
International Classification:
H03M001/66
US Classification:
341/144000
Abstract:
A segmented digital-to-analog converter includes: upper segments , and ; a thermometer decoder ; a randomizing circuit coupled between the thermometer decoder and the upper segments , and for randomizing an output of the thermometer decoder ; a divider location selector circuit coupled between the randomizing circuit and the upper segments , and for choosing a selected segment from the upper segments , and ; and lower segments coupled to the selected segment.
Alexander R Bugeja from The Colony, TX, age ~51 Get Report