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Alain Chapuis Phones & Addresses

  • Morgan Hill, CA

Publications

Us Patents

Method And System For Current Sharing Among A Plurality Of Power Modules

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US Patent:
6788036, Sep 7, 2004
Filed:
Mar 28, 2003
Appl. No.:
10/401463
Inventors:
Johann Ferdinand Milavec - Windisch, CH
Alain Chapuis - Morgan Hill CA
Assignee:
Ower-One Limited
International Classification:
G05F 140
US Classification:
323272, 323237
Abstract:
A method and apparatus for sharing current among a plurality of power modules is provided. The method includes sensing of a characteristic of an output power signal of at least one of the plurality of power modules and providing a first signal having a pulse width corresponding to the sensed characteristic. The first signal is imparted onto a current share bus coupled to each of the plurality of power modules if the first signal has a pulse width greater than corresponding first signals of other power modules coupled to the current share bus, whereupon one of the first signals from the plurality of power modules having greatest pulse width is imparted onto the current share bus as a second signal. A phase difference between the first signal and the second signal is detected and a feedback signal is provided to the at least one power module in response to the detected phase difference. The feedback signal thereby controls the at least one power module to regulate the output power signal.

System And Method For Providing Digital Pulse Width Modulation

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US Patent:
6833691, Dec 21, 2004
Filed:
Nov 19, 2002
Appl. No.:
10/299439
Inventors:
Alain Chapuis - Morgan Hill CA
Assignee:
Power-One Limited
International Classification:
G05F 140
US Classification:
323283, 323225
Abstract:
A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially. The pulse width modulation system includes a timing circuit for providing timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over timing cycles, is approximately equal to the predetermined average duty cycle. The pulse width modulated signal is used by a switching power supply circuit to control at least one power switching device.

Digital Signal Processor Architecture Optimized For Controlling Switched Mode Power Supply

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US Patent:
6850046, Feb 1, 2005
Filed:
Feb 10, 2003
Appl. No.:
10/361452
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One Limited
International Classification:
G05F 140
US Classification:
323282, 363 65
Abstract:
A switched mode power supply comprises at least one power switch adapted to convey power between input and output terminals of the power supply, and a digital controller adapted to control operation of the at least one power switch responsive to an output parameter of the power supply. The digital controller comprises an analog-to-digital converter providing a digital error signal representing a difference between the output parameter and a reference value, a digital filter providing a digital control output based on a sum of current and previous error signals and previous control outputs, the error signals comprising integers having a relatively low numerical range and said control outputs comprising integers having a relatively high numerical range, and a digital pulse width modulator providing a control signal to the power switch having a pulse width corresponding to the digital control output. The digital filter further comprises an asymmetric arithmetic unit adapted to combine the low range integers with the high range integers.

Digital Control System And Method For Switched Mode Power Supply

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US Patent:
6933709, Aug 23, 2005
Filed:
Feb 10, 2003
Appl. No.:
10/361667
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One Limited
International Classification:
G05F001/40
US Classification:
323282, 363 65
Abstract:
A power supply comprises at least one power switch adapted to convey power between input and output terminals of the power supply, and a digital controller adapted to control operation of the at least one power switch responsive to an output measurement of the power supply. The digital controller comprises an analog-to-digital converter providing a digital error signal representing a difference between the output measurement and a reference value, a digital filter providing a digital control output based on a sum of previous error signals and previous control outputs, an error controller adapted to modify operation of the digital filter upon an error condition, and a digital pulse width modulator providing a control signal to the power switch having a pulse width corresponding to the digital control output. A method for controlling the power supply comprises the steps of receiving an output measurement of the power supply, sampling the output measurement to provide a digital error signal representing a difference between the output measurement and a reference value, filtering the digital error signal to provide a digital control output based on a sum of previous error signals and previous control outputs, modifying operation of the filtering step upon an error condition, and providing a control signal to the at least one power switch, the control signal having a pulse width corresponding to the digital control output.

System And Method For Controlling Output-Timing Parameters Of Power Converters

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US Patent:
6936999, Aug 30, 2005
Filed:
Mar 14, 2003
Appl. No.:
10/388831
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One Limited
International Classification:
G05F001/40
US Classification:
323282
Abstract:
A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e. g. , slew-rate data), to generate an output having a particular slew rate.

System And Method For Controlling A Point-Of-Load Regulator

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US Patent:
6949916, Sep 27, 2005
Filed:
Nov 12, 2002
Appl. No.:
10/293531
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One Limited
International Classification:
G05F001/40
US Classification:
323282
Abstract:
A system and method is provided for using a serial bus to communicate (either passively or actively) with a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) communicates with at least one POL regulators by writing and/or reading data (either synchronously or asynchronous) over a unidirectional or bi-directional serial bus. In one embodiment of the present invention, the controller is adapted to write initial-configuration data (e. g. , output voltage set-point, current limit set-point, etc. ) to at least one POL regulator via the serial bus. At least a portion of the initial-configuration data is then used by the POL regulator to produce a particular output. In another embodiment of the invention, each POL regulator includes at least one register for maintaining POL information, such as unique identification information, fault protection information, output voltage set-point data, current limit set-point data, etc. The controller is then adapted to monitor and retrieve this information (i. e.

Adaptive Delay Control Circuit For Switched Mode Power Supply

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US Patent:
6958592, Oct 25, 2005
Filed:
Nov 26, 2003
Appl. No.:
10/724509
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One, Inc. - Camarillo CA
International Classification:
G05F001/40
US Classification:
323246, 323284, 327161
Abstract:
A switched mode power supply comprises a first switch coupled to an input power source, a second switch coupled to ground, and an output filter coupled to a phase node defined between the first and second switches. The first and second switches are responsive to a pulse width modulated signal to thereby regulate power provided to the output filter. A controller is provided in a feedback loop that monitors operation of the first and second switches and delays activation of one of the first and second switches to preclude simultaneous conduction. The controller comprises at least one delay control circuit adapted to delay delivery of the pulse width modulated signal to at least one of the first and second switches. The delay control circuit detects a phase difference between state transitions of the first and second switches and provides a delay corresponding to a magnitude of the phase difference.

System And Method For Providing Digital Pulse Width Modulation

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US Patent:
6989661, Jan 24, 2006
Filed:
Nov 11, 2004
Appl. No.:
10/986607
Inventors:
Alain Chapuis - Morgan Hill CA, US
Assignee:
Power-One, Inc. - Camarillo CA
International Classification:
G05F 1/40
US Classification:
323283, 323225
Abstract:
A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2. The pulse width modulation system includes a timing circuit for providing 2timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2timing cycles, is approximately equal to the predetermined average duty cycle. The pulse width modulated signal is used by a switching power supply circuit to control at least one power switching device.

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Alain Chapuis Wikipdia

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Alain Chapuis est un acteur de thtre et de tlvision, et metteur en scne franais. Il est principalement connu pour jouer le rle du tavernier dans la ...

Alain Chapuis from Morgan Hill, CA, age ~56 Get Report