Yoon Ja Lee

59867094, Nov 16, 1999

Nov 18, 1996

8/751493

Yoon Yung Lee - San Jose CA

Samsung Electronics Co., Ltd. - Seoul

H04N 730

348403

A process that alleviates processor overloading, adaptively according to the current total processor load, by gracefully degrading video output quality, so that more jobs can be run simultaneously in a multitasking operating system environment is provided. The process reduces computation for video data decompression by substituting zero values for elements of one or more bottom rows of the matrix that is multiplied to a kernel matrix in the two-dimensional inverse discrete cosine transform. In one embodiment, a process is incorporated into an MPEG firmware as a part of library modules built into a multimedia signal processor integrated circuit, which runs a real-time multitasking operating system. If running an additional video decompression task will overload the processor, the operating system rejects running the task. When the additional video compression task is rejected, a degraded version, which will not overload the processor, of the original decompression task is submitted to the operating system.

58451129, Dec 1, 1998

Mar 6, 1997

8/812774

Le Trong Nguyen - Monte Sereno CA
Heonchul Park - Cupertino CA
Cliff Reader - Saratoga CA
Yoon Lee - San Jose CA

Samsung Electronics Co., Ltd. - Seoul

G06F 9302

395562

An extension to existent vector instruction sets is presented in a form of new vector instructions which perform operations specialized for efficient digital video compression and decompression. A processor is designed to implement the arithmetic operation of each of these instructions in a single clock cycle, and some of the present instructions perform arithmetic operations selectively and directly on elements of the same registers.

20220295020, Sep 15, 2022

Jul 27, 2020

17/630901

- San Francisco CA, US
Harshad KADU - Santa Clara CA, US
Neeraj J. GADGIL - Pune, IN
Qing SONG - , US
Yoon Yung LEE - Sunnyvale CA, US

Dolby Laboratories Licensing Corporation - San Francisco CA

H04N 9/04
G06T 5/00
G06T 5/40
G06T 7/90
H04N 19/186
H04N 19/98

A device includes an electronic processor configured to define a first set of sample pixels from a set of sample pixels determined from received video data according to a first electro-optical transfer function (EOTF) in a first color representation of a first color space; convert the first set of sample pixels to a second EOTF via a mapping function, producing a second set of sample pixels according to the second EOTF; convert the first and second set of sample pixels from the first color representation to a second color representation of the first color space; determine a backward reshaping function by repeatedly applying and adjusting a sample backward reshaping function so as to minimize a difference between predicted pixel values obtained by applying the sample backward reshaping function to the pixels of the converted first set and the pixels of the converted second set.

20210150680, May 20, 2021

Jun 13, 2018

16/623326

- San Francisco CA, US
Tao CHEN - Palo Alto CA, US
Yoon Yung LEE - San Jose CA, US

Dolby Laboratories Licensing Corporation - San Francisco CA

G06T 5/00
G06T 5/40
H04N 19/186
H04N 19/98

A standard dynamic range (SDR) image is received. Composer metadata is generated for mapping the SDR image to an enhanced dynamic range (EDR) image. The composer metadata specifies a backward reshaping mapping that is generated from SDR-EDR image pairs in a training database. The SDR-EDR image pairs comprise SDR images that do not include the SDR image and EDR images that corresponds to the SDR images. The SDR image and the composer metadata are encoded in an output SDR video signal. An EDR display operating with a receiver of the output SDR video signal is caused to render an EDR display image. The EDR display image is derived from a composed EDR image composed from the SDR image based on the composer metadata.