Yoon H Kim

20020065649, May 30, 2002

Aug 15, 2001

09/929944

Yoon Kim - San Jose CA, US

G10L019/10
G10L019/08
G10L019/04

704/219000

The present invention is an apparatus and method for generating parametric representation of input speech based on a mel-frequency warping of the vocal tract spectrum which is computationally efficient and provides increased recognition accuracy over conventional LP cepstrum approaches. It is capable of rapid processing operable in many different devices. The invention is a speech recognition system comprising linear prediction (LP) signal processor and a mel-frequency linear prediction (MFLP) generator for mel-frequency warping the LP parameters to generate MFLP parametric representations for robust, perceptually modeled speech recognition requiring minimal computation and storage.

54918065, Feb 13, 1996

Jun 26, 1990

7/543936

Jens Horstmann - Sunnyvale CA
Yoon Kim - Danville CA

LSI Logic Corporation - Milpitas CA

G06F 1210

395417

An optimized translation lookaside buffer (TLB) utilizes a least-recently-used algorithm for determining the replacement of virtual-to-physical memory translation entries. The TLB is faster and requires less chip area for fabrication. In addition to speed and size, the TLB is also optimized since many characteristics of the TLB may be changed without significantly changing the overall layout of the TLB. A TLB generating program may thus be used as a design aid. The translation lookaside buffer includes a level decoding circuit which allows masking of a variable number of the bits of a virtual address when it is compared to values stored within the TLB. The masking technique may be used for indicating a TLB hit or miss of a virtual address to be translated, and may also be used for invalidating selected entries within the TLB. The TLB also implements a pipelining technique wherein a LRU comparator compares the least significant bits of a LRU counter at the same time when the most significant bits of the LRU counter are being incremented. Finally, an address decoder is provided within the TLB for indexing each slice during a test mode to check for malfunctions.

63048442, Oct 16, 2001

Mar 30, 2000

9/538657

James Pan - Stanford CA
Yoon Kim - Palo Alto CA
Josephine Chang - San Jose CA
Juinn-Yan Chen - Fremont CA

VerbalTek, Inc. - San Jose CA

G10L 1502
G10L 1504
G10L 1518

704257

An accurate speech recognition system capable of rapidly processing greater varieties of words and operable in many different devices, but without the computational power and memory requirements, high power consumption, complex operating system, high costs, and weight of traditional systems. The utilization of individual letter utterances to transmit words allows voice information transfer for both person-to-person and person-to-machine communication for mobile phones, PDAs, and other communication devices. This invention is an apparatus and method for a speech recognition system comprising a microphone, front-end signal processor for generating parametric representations of speech input signals, a pronunciation database, a letter similarity comparator for comparing the parametric representation of the input signals with the parametric representations of letter pronunciations, and generating a sequence of associations between the input speech and the letters in the pronunciation database, a vocabulary database, a word similarity comparator for comparing an aggregated plurality of the letters with the words in the vocabulary database and generating a sequence of associations between them, and a display for displaying the selected letters and words for confirmation.

55465552, Aug 13, 1996

Oct 28, 1994

8/330756

Jens Horstmann - Sunnyvale CA
Yoon Kim - Danville CA

LSI Logic Corporation - Milpitas CA

G06F 1210

395417

An optimized translation lookaside buffer (TLB) utilizes a least-recently-used algorithm for determining the replacement of virtual-to-physical memory translation entries. The TLB is faster and requires less chip area for fabrication. In addition to speed and size, the TLB is also optimized since many characteristics of the TLB may be changed without significantly changing the overall layout of the TLB. A TLB generating program may thus be used as a design aid. The translation lookaside buffer includes a level decoding circuit which allows masking of a variable number of the bits of a virtual address when it is compared to values stored within the TLB. The masking technique may be used for indicating a TLB hit or miss of a virtual address to be translated, and may also be used for invalidating selected entries within the TLB. The TLB also implements a pipelining technique wherein a LRU comparator compares the least significant bits of a LRU counter at the same time when the most significant bits of the LRU counter are being incremented. Finally, an address decoder is provided within the TLB for indexing each slice during a test mode to check for malfunctions.

61254339, Sep 26, 2000

May 17, 1995

8/442726

Jens Horstmann - Sunnyvale CA
Yoon Kim - Danville CA

LSI Logic Corporation - Milpitas CA

G06F 1210

711160

An optimized translation lookaside buffer (TLB) utilizes a least-recently-used algorithm for determining the replacement of virtual-to-physical memory translation entries. The TLB is faster and requires less chip area for fabrication. In addition to speed and size, the TLB is also optimized since many characteristics of the TLB may be changed without significantly changing the overall layout of the TLB. A TLB generating program may thus be used as a design aid. The translation lookaside buffer includes a level decoding circuit which allows masking of a variable number of the bits of a virtual address when it is compared to values stored within the TLB. The masking technique may be used for indicating a TLB hit or miss of a virtual address to be translated, and may also be used for invalidating selected entries within the TLB. The TLB also implements a pipelining technique wherein a LRU comparator compares the least significant bits of a LRU counter at the same time when the most significant bits of the LRU counter are being incremented. Finally, an address decoder is provided within the TLB for indexing each slice during a test mode to check for malfunctions.

20230096053, Mar 30, 2023

Dec 4, 2020

17/782465

- Stanford CA, US
Zhenan Bao - Stanford CA, US
Jia Liu - Stanford CA, US
Charu Ramakrishnan - Stanford CA, US
Yoon Seok Kim - Stanford CA, US
Ariane C. Tom - Stanford CA, US

A61L 27/26
C12N 9/08
C12N 15/62
C12N 15/86
C12N 5/0793
G01N 33/50
C07K 14/405
A61N 1/32

Compositions and methods are provided for genetically modifying cells to guide in situ chemical synthesis of electroactive, conductive, or insulating polymers on plasma membranes, organelle membranes, or subcellular surfaces of cells. In particular, compositions and methods are provided for genetically modifying excitable cells such as neurons, muscle cells, and endocrine cells to guide in situ chemical synthesis of polymers on the extracellular side of the plasma membrane. The subject methods can be used in various applications, for example, to assemble polymers in vivo at targeted locations to modulate electrical conduction and create new electrical conduction pathways, allow cell-type-specific neuromodulation, provide a conductive structure on cells for connection to electrodes, sensors, or other external electronic and electrochemical devices, and create a durable structure to replace damaged tissue for use in regenerative medicine.

20230064644, Mar 2, 2023

Feb 3, 2021

17/796839

- Stanford CA, US
Charu Ramakrishnan - San Jose CA, US
Yoon Seok Kim - Stanford CA, US
Lief E. Fenno - Palo Alto CA, US

C12N 15/85
C12N 15/66

The present disclosure provides recombinant expression vectors for modulating production of polypeptides of interest in a target cell or target cell population. Aspects of the disclosure include recombinant expression vectors having coding sequences encoding portions of a polypeptide of interest, where the coding sequences are flanked by recombinase recognition sites. Also provided are methods for using the recombinant expression vectors as well as a device for monitoring expression of the polypeptide of interest.

20180366105, Dec 20, 2018

Aug 22, 2018

16/109546

- Cupertino CA, US
Yoon KIM - Los Altos CA, US

G10L 15/01
G10L 15/22
G10L 25/60
H04R 29/00

This relates to providing an indication of the suitability of an acoustic environment for performing speech recognition. One process can include receiving an audio input and determining a speech recognition suitability based on the audio input. The speech recognition suitability can include a numerical, textual, graphical, or other representation of the suitability of an acoustic environment for performing speech recognition. The process can further include displaying a visual representation of the speech recognition suitability to indicate the likelihood that a spoken user input will be interpreted correctly. This allows a user to determine whether to proceed with the performance of a speech recognition process, or to move to a different location having a better acoustic environment before performing the speech recognition process. In some examples, the user device can disable operation of a speech recognition process in response to determining that the speech recognition suitability is below a threshold suitability.