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Ye E Liu

from Suwanee, GA
Age ~59
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Also known as:
Yi Ying Li, Ivy Liu, Ye Lui, Leng Ye
Related to:
Liping Wang, 62Ivy LiuTianshan WangDianna Wong, 65Xing T Wang
Connected to:
Adela Liu, 73Alec X Liu, 39Alpha T Liu, 46Amon Y Liu, 58Andrea Y Liu, 46Anqi Liu, 39Arden K Liu, 64Ba S Liu, 62Bailu Liu, 35Ban Liu, 48

Ye Liu Phones & Addresses

  • Suwanee, GA
  • Johns Creek, GA
  • 13250 Emily St, Dallas, TX 75240 (972) 783-6544
  • 7170 Handbell Ln, Duluth, GA 30097 (770) 623-8489
  • Plano, TX
  • Fremont, CA
  • Alameda, CA
  • New Albany, OH
  • Powell, OH
  • Reynoldsburg, OH

Resumes

Resumes

Ye Liu Photo 1

Architect At Tsao & Mckown Architects

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Position:
Architect at Tsao & McKown Architects
Location:
New York, New York
Industry:
Architecture & Planning
Work:
Tsao & McKown Architects - New York, New York since Sep 2012
Architect
RTKL Associates Inc. - Washington D.C. Metro Area Jul 2011 - Aug 2012
Architectural and Urban Designer
Atelier Liu Yuyang Architects - Shanghai, China Dec 2007 - May 2009
Senior Project Designer
Fake Design - Ai Weiwei's Studio - Beijing, China Sep 2005 - Aug 2007
Architect & Art Manager Assistant
Arata Isozaki & Associates - Shanghai, China Apr 2006 - Mar 2007
Architect
Education:
Cranbrook Academy of Art 2009 - 2011
Master, Architecture Tongji University 2001 - 2006
Bachelor, Architecture
Skills:
AutoCAD Architecture
Rhinoceros
SketchUp
3ds Max
Adobe Photoshop
Adobe Illustrator
Adobe InDesign
Adobe Dreamweaver
MS-Office
Mac OS X
Windows
Urban Planning
Architecture
Urban Design
Concept Design
Design Development
Modeling
Adobe Creative Suite
AutoCAD
Sketching
Photography
Design Research
Languages:
Chinese
English
Ye Liu Photo 2

Ye Liu

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Ye Liu Photo 3

Ye Liu

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Ye Liu Photo 4

Ye Liu

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Ye Liu Photo 5

Ye Liu

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Ye Liu Photo 6

Ye Liu

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Ye Liu
Principal
AMLYNX INCORPORATED
Business Services at Non-Commercial Site
408 Remington Dr, Plano, TX 75094
4408 Creekstone Dr, Plano, TX 75093
Ye Liu
Director
WEB4RUNNER LIMITED LIABILITY COMPANY
4320 Belvedere Dr, Plano, TX 75093
4320 Belverde Dr, Plano, TX 75093
4408 Creekstone Dr, Plano, TX 75093

Publications

Us Patents

Conditional Adaptation Of Linear Filters In A System Having Nonlinearity

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US Patent:
20130148712, Jun 13, 2013
Filed:
Dec 9, 2011
Appl. No.:
13/315831
Inventors:
Amaresh Malipatil - , US
Pervez M. Aziz - Dallas TX, US
Mohammad S. Mobin - , US
Ye Liu - San Jose CA, US
International Classification:
H04L 27/01
US Classification:
375233
Abstract:
Described embodiments adjust configurable parameters of at least one filter of a communication system. The method includes conditioning, by an analog front end (AFE) of a receiver in the communication system, an input signal applied to the receiver. Sampled values of the conditioned input signal are generated and digitized. An error detection module generates an error signal based on digitized values of the input signal and a target value. A decision feedback equalizer generates an adjustment signal based on the digitized values of the input signal and values of the error signal. A summer subtracts the adjustment signal from the conditioned input signal, generating an adjusted input signal. An adaptation module determines a conditional adaptation signal based on a comparison of sampled values of the adjusted input signal and values of the error signal. The adaptation module adjusts a transfer function of at least one filter based on the conditional adaptation signal.

Receiver Having Limiter-Enhanced Data Eye Openings

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US Patent:
20140211839, Jul 31, 2014
Filed:
Mar 28, 2014
Appl. No.:
14/228913
Inventors:
- Milpitas CA, US
Pervez M. Aziz - Dallas TX, US
Ye Liu - San Jose CA, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
H04L 25/03
US Classification:
375233, 375340, 375232
Abstract:
A communication system having a receiver with a linear path and a nonlinear path. As the receiver receives a data signal, it adaptively equalizes the received signal, and amplitude-limits the equalized signal in the nonlinear path using a saturable amplifier limiter or the like. A slicer extracts data from the limited equalized received signal. In the linear path, a clock recovery circuit generates a clock signal from the equalized received signal. A delay circuit in the linear path at least partially compensates for propagation delay in the limiter. Having the clock recovery occur in other than the nonlinear path, a low jitter clock is generated. The limiter enhances the vertical opening of the data eye by increasing the rise and fall times of the limited signal, providing more noise margin for the slicer to operate with and a greater timing margin in which to sample the sliced data.
Control profile
Ye E Liu from Suwanee, GA, age ~59 Get Report