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Xing Wu Phones & Addresses

  • San Carlos, CA
  • San Mateo, CA
  • Oakland, CA
  • 1580 Hudson Ave, San Francisco, CA 94124 (415) 298-1308

Resumes

Resumes

Xing Wu Photo 1

Xing Wu

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Location:
United States
Xing Wu Photo 2

Xing Wu

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Xing Wu
Owner
Harvest Kitchen & Mosaic
Tile/Marble Contractor · Custom Cabinets · Ceramic Tile · Countertops · Flooring · Hardwood Floor Repair · Bathroom & Kitchen Remodeling
920 Ctr St, San Carlos, CA 94070
(650) 620-9639
Xing F. Wu
LILY WU INC

Publications

Us Patents

System And Method For Generating A Frequency Rich Spectrum In A Data Stream

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US Patent:
8165176, Apr 24, 2012
Filed:
Sep 30, 2008
Appl. No.:
12/241253
Inventors:
William Lo - Cupertino CA, US
Tsungtang Wang - Santa Clara CA, US
Xing Wu - San Jose CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
H04J 3/02
US Classification:
370535, 370503
Abstract:
A system and method for generating a frequency rich spectrum in a data stream is disclosed. A network interface comprises a substitutor module, a symbol replacement module, and an encoder module. The substitutor module replaces idle streams in a first data stream with alignment symbols, boundary symbols and disposable symbols to generate a second data stream. The symbol replacement module receives the second data stream, generates random data, and replaces one or more of the disposable symbols in the second data stream with the random data in order to generate a third data stream. The encoder module encodes the third data stream.

Decision Feedback Equalization For Signals Having Unequally Distributed Patterns

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US Patent:
8542725, Sep 24, 2013
Filed:
Nov 12, 2008
Appl. No.:
12/269744
Inventors:
Haoli Qian - Sunnyvale CA, US
Xing Wu - San Jose CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
H04B 17/00
US Classification:
375232, 375229
Abstract:
Tools capable of improving the accuracy of decision feedback equalization (DFE) are described. The tools may adapt a DFE using a more-equal distribution of signals than those actually received. The tools may do so by disregarding, averaging, or weighting certain signals when adapting the DFE when those signals represent an unequal distribution of bit patterns. In one example, the tools detect and disregard some of the signals representing idle bit patterns that are received more often than other bit patterns. The tools may also or instead compensate for a bit pattern that is never or rarely received.

Measuring Reception Quality Of A Differential Manchester Encoded Signal

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US Patent:
20220271877, Aug 25, 2022
Filed:
Feb 20, 2022
Appl. No.:
17/676158
Inventors:
- Singapore, SG
Xing Wu - Palo Alto CA, US
Wensheng Sun - San Jose CA, US
Liang Zhu - Shanghai, CN
International Classification:
H04L 1/20
H04L 1/00
H03M 7/36
Abstract:
A receiver includes an interface and a processor. The interface is configured to receive a signal including symbols carrying bit values in respective symbol intervals, and to convert the received signal into a serial sequence of digital samples, the received signal being modulated using a Differential Manchester Encoding (DME) scheme that (i) represents a first bit value by a first symbol type having a level transition in the corresponding symbol interval and (ii) represents a second bit value by a second symbol type having a constant level in the corresponding symbol interval. The processor is configured to derive an error signal from the digital samples, and to produce a quality measure of the received signal based on the derived error signal.

Precoding For Asymmetric Two-Way Ethernet Physical Layer

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US Patent:
20210067193, Mar 4, 2021
Filed:
Aug 27, 2020
Appl. No.:
17/004027
Inventors:
- Singapore, SG
Xing Wu - Palo Alto CA, US
Mats Oberg - San Jose CA, US
International Classification:
H04B 1/56
H04B 3/50
H04L 5/14
H04L 25/03
Abstract:
An Ethernet physical layer (PHY) transceiver includes a transmitter and a receiver. The transmitter is configured to precode a first data stream by summing two or more mutually-delayed replicas of the first data stream, and to transmit the precoded first data stream over a full-duplex wired channel to a peer Ethernet PHY transceiver. The receiver is configured to receive a second data stream from the peer Ethernet PHY transceiver over the full-duplex wired channel, and to decode the received second data stream while the transmitter concurrently is transmitting the precoded first data stream.

Systems And Methods For Waking A Network Interface Device In A Low Power Mode

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US Patent:
20200287730, Sep 10, 2020
Filed:
Mar 6, 2020
Appl. No.:
16/811956
Inventors:
- Singapore, SG
Wyant Chan - Mountain View CA, US
Xing Wu - Palo Alto CA, US
Liang Zhu - Shanghai, CN
Hon Wai Fung - Newark CA, US
International Classification:
H04L 12/10
H04B 1/40
H04L 29/08
H04L 5/00
Abstract:
Embodiments described herein provide a method for waking a first node in a low power mode. A network comprises at least the first node and a second node in an awake mode where the first and second nodes have respective transceivers coupled via substantially fixed communication pathways. The transceiver of the second node obtains a training signal designed to be transmitted at a pre-defined symbol rate and transmits the training signal at a symbol rate lower than the pre-defined symbol rate to the physical layer of the first node for a predetermined duration of time. The second node, in response to receiving the training signal transitions from the low power mode to an awake state.

Ethernet Transceiver With Phy-Level Signal-Loss Detector

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US Patent:
20200106594, Apr 2, 2020
Filed:
Dec 4, 2019
Appl. No.:
16/702628
Inventors:
- St. Michael, BB
Xing Wu - Palo Alto CA, US
International Classification:
H04L 5/14
H04B 3/23
H04L 12/26
H04L 12/24
H04B 3/493
H04L 1/00
H04L 1/20
Abstract:
An Ethernet transceiver includes physical-layer (PHY) circuitry and a signal-loss detector. The PHY circuitry is configured to receive a signal from a peer transceiver, to process the received signal in a series of digital PHY-level processing operations, and to output the processed signal for Medium Access Control (MAC) processing. The signal-loss detector is configured to receive, from the PHY circuitry, a digital version of the received signal, and to detect a signal-loss event based on an amplitude of the digital version of the received signal.

Ethernet Transceiver With Phy-Level Signal-Loss Detector

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US Patent:
20190165921, May 30, 2019
Filed:
Sep 20, 2018
Appl. No.:
16/136329
Inventors:
- St. Michael, BB
Xing Wu - Palo Alto CA, US
International Classification:
H04L 5/14
H04B 3/23
H04B 3/493
H04L 12/24
H04L 12/26
Abstract:
An Ethernet transceiver includes physical-layer (PHY) circuitry and a signal-loss detector. The PHY circuitry is configured to receive a signal from a peer transceiver, to process the received signal in a series of digital PHY-level processing operations, and to output the processed signal for Medium Access Control (MAC) processing. The signal-loss detector is configured to receive, from the PHY circuitry, a digital version of the received signal, and to detect a signal-loss event based on an amplitude of the digital version of the received signal.
Xing Yang Wu from San Carlos, CA, age ~45 Get Report