Xin Wang

7337424, Feb 26, 2008

Mar 24, 2005

11/089723

Shao-Po Wu - Portola Valley CA, US
Xin Wang - Sunnyvale CA, US
Mark Pilloff - Millbrae CA, US

Aprio Technologies, Inc. - Santa Clara CA

G06F 17/50

716 19

Transient edges are used to define shapes in an integrated circuit layout for optical proximity correction. A first variation of the shape includes a first edge, a second edge satisfying an edge transition angle condition in relation to the first edge, and one or more first transition edges connected between the first edge and the second edge. A second variation of the shape includes a third edge, a fourth edge satisfying the same edge transition angle condition in relation to the third edge, and one or more second transition edges connected between the third edge and the fourth edge. Although the first transition edges are different from the second transition edges, both the first and second variations of the shape are identified as having the same shape, thereby allowing flexibility and efficiency in the shape identification process for optical proximity correction.

7404173, Jul 22, 2008

Mar 7, 2005

11/074882

Shao-Po Wu - Portola Valley CA, US
Xin Wang - Sunnyvale CA, US
Hongbo Tang - San Jose CA, US
Meg Hung - Saratoga CA, US

Aprio Technologies, Inc. - Sunnyvale CA

G06F 17/50
G03F 1/00
G03F 9/00

716 19, 716 21, 430 5, 430 22

Intermediate resolution-enhancement state layouts are generated based upon an original non-resolution enhanced layout of an integrated circuit and an associated resolution-enhanced layout. The intermediate resolution-enhancement state layout includes fragments corresponding to parts of the original layout and biases associated with the fragments, where the biases indicate distances between the fragments and the resolution-enhanced layout. The fragments are also assigned attributes such as fragment type, fragment location, and biases. The intermediate resolution-enhancement state layouts can be combined to generate the layout for a full chip IC. Two or more intermediate resolution-enhancement state layouts are assembled and are locally reconverged to adjust the resolution enhancement associated with the intermediate resolution-enhancement state layouts and obtain the intermediate resolution-enhancement state layouts for the full IC.

7979811, Jul 12, 2011

Apr 8, 2008

12/099663

Shao-Po Wu - Portola Valley CA, US
Xin Wang - Sunnyvale CA, US
Hongbo Tang - San Jose CA, US
Meg Hung - Saratoga CA, US

Tela Innovations, Inc. - Los Gatos CA

G06F 17/50

716 50, 716 51, 716 52, 716 53, 716 54, 716 55

Intermediate resolution-enhancement state layouts are generated based upon an original non-resolution enhanced layout of an integrated circuit and an associated resolution-enhanced layout. The intermediate resolution-enhancement state layout includes fragments corresponding to parts of the original layout and biases associated with the fragments, where the biases indicate distances between the fragments and the resolution-enhanced layout. The fragments are also assigned attributes such as fragment type, fragment location, and biases. The intermediate resolution-enhancement state layouts can be combined to generate the layout for a full chip IC. Two or more intermediate resolution-enhancement state layouts are assembled and are locally reconverged to adjust the resolution enhancement associated with the intermediate resolution-enhancement state layouts and obtain the intermediate resolution-enhancement state layouts for the full IC.

8027869, Sep 27, 2011

Oct 18, 2002

10/273632

Daniel T. Chang - Belmont CA, US
Pasan Rukmal Sirisena - San Mateo CA, US
Xin Wang - Sunnyvale CA, US
Tao Gui - Foster City CA, US
Charles Shagong - Menlo Park CA, US
Alexander Goldstein - Foster City CA, US
Steve Apfelberg - Menlo Park CA, US
Marc Verbeek - Foster City CA, US
Tarri Furlong - San Leandro CA, US
Ashley Stirrup - Burlingame CA, US
Ajay Sabhlok - Fremont CA, US
Martin Renaud - San Carlos CA, US

Siebel Systems, Inc. - San Mateo CA

G06Q 10/00

705 738, 705 712, 705 715, 7079991

A method, system, and article of manufacture for defining and managing instances of time-based organization hierarchies, and for monitoring achievement and attainment, and calculating compensation for individuals and/or groups within instances of the time-based organization hierarchies are disclosed herein. In one embodiment, a user may define and/or manage one or more instances of the time-based organization hierarchy via a user interface generated on a client. Moreover, and in response to a sales data input corresponding to a transaction, an achievement and attainment monitoring process may then be executed to accumulate transaction data in one or more achievement containers, and to compile achievement containers from a specified attainment period to calculate a user's attainment. In addition, an embodiment also provides for implementation of a compensation calculation process that may utilize the transaction data accumulated in the achievement containers to calculate an individual's compensation for a specified compensation period.

8103561, Jan 24, 2012

Nov 14, 2008

12/271157

Byung-Hyun Chung - Danville CA, US
Xin Wang - Los Altos CA, US
Min Zhu - Pleasanton CA, US
Craig Hushaw - Stockton CA, US

Oracle International Corporation - Redwood Shores CA

G07B 17/00

705 30, 705 33, 705 14, 705 35, 705 36 R, 7071041

Systems and methods for reconciling financial transactions are described with respect to a number of embodiments of the present disclosure. In one implementation, among others, a method includes enabling a user to define how different types of financial items are grouped. The grouped financial items are selected from one of a financial statement associated with a first account with a first financial institution and financial data recorded by a customer of the first financial institution. The method also includes enabling the user to set matching criteria for matching financial items of the financial statement with financial items of the customer recorded financial data.

8108273, Jan 31, 2012

Feb 5, 2009

12/365950

Neerav Handa - Sunnyvale CA, US
Debashis Sadhukhan - Milpitas CA, US
Byung-Hyun Chung - Danville CA, US
Xin Wang - Los Altos CA, US
Min Zhu - Pleasanton CA, US
Craig Hushaw - Stockton CA, US

Oracle International Corporation - Redwood Shores CA

G07B 17/00
G07F 19/00

705 30, 707634, 707635, 707610

Systems and methods for replicating data communicated over a network. According to one embodiment, among several embodiment, a data replication system includes a first interface table and a first application associated with a first computing system. The first application is configured to transfer data into the first interface table. The data replication system further includes a first replication module, which is also associated with the first computing system. The first replication module is configured to replicate data from the first interface table into a second interface table associated with a second computing system via a network. The data replication system also includes a second application and a second replication module associated with the second computing system. The second application is configured to transfer data into the second interface table. The second replication module is configured to replicate data from the second interface table into the first interface table via the network.

20050229130, Oct 13, 2005

Apr 7, 2004

10/820260

Shao-Po Wu - Portola Valley CA, US
Xin Wang - Sunnyvale CA, US
Hongbo Tang - San Jose CA, US
Meg Hung - Saratoga CA, US

Aprio Technologies, Inc. - Palo Alto CA

G06F017/50

716008000, 716010000

An automated design for manufacturability platform for integrated physical verification and manufacturing enhancement operations. Given original layouts and one or more associated resolution-enhanced layouts, intermediate resolution-enhancement state layouts are reconstructed, and selective localized resolution-enhancement reconfigurations, modifications, and/or perturbations are introduced on any existing enhancements in order to improve manufacturability and yield.

20120136778, May 31, 2012

Jan 19, 2012

13/353799

Neerav HANDA - Sunnyvale CA, US
Debashis SADHUKHAN - Milpitas CA, US
Byung-Hyun CHUNG - Danville CA, US
Xin WANG - Los Altos CA, US
Min ZHU - Pleasanton CA, US
Craig HUSHAW - Stockton CA, US

ORACLE INTERNATIONAL CORPORATION - Redwood Shores CA

G06Q 20/10

705 39

Systems and methods for deciding whether to void a payment are provided. The method includes sending a signal to a web service provider to request information as to whether a payment has been reconciled, and receiving a first response from the web service provider. If the first response from the web service provider indicates that the payment has not been reconciled: performing a void process to void the payment, committing data related to the void process to an interface table, and receiving a second response from the web service provider. The second response includes status information of the payment replicated from a second interface table associated with the web service provider to the interface table. If the first response from the web service provider indicates that the payment has already been reconciled, deciding not to perform the void process.