Tong X Chen

8006238, Aug 23, 2011

Sep 26, 2006

11/535172

Alexandre E. Eichenberger - Chappaqua NY, US
John Kevin Patrick O'Brien - South Salem NY, US
Kathryn M. O'Brien - South Salem NY, US
Tong Chen - Yorktown Heights NY, US

International Business Machines Corporation - Armonk NY

G06F 9/45
G06F 9/40
G06F 9/46

717150, 717149, 717160, 712204, 718102, 718104

A process, compiler, computer program product and system for workload partitioning in a heterogeneous system. The process includes determining heterogeneous alignment constraints in the workload, partitioning a portion of tasks to a processing element sensitive to alignment constraints, and partitioning a remaining portion of tasks to a processing element not sensitive to alignment constraints.

20130150013, Jun 13, 2013

Jul 11, 2012

13/546515

Yuan Liu - Holmdel NJ, US
Jun Lin - Cupertino CA, US
Yaxin Cao - Laurence Harbor NJ, US
Sethuraman Gurumoorthy - Piscataway NJ, US
Tong Chen - Cliffwood NJ, US
Rami Mehio - San Diego CA, US
Jin-Sheng Su - San Diego CA, US
Arun Visvanath - San Diego CA, US

Broadcom Corporation - Irvine CA

H04W 4/00

455418

Systems and methods are presented to support operation of a multiple subscriber identity module (SIM) device. A timing conflict may exist when a scheduled high priority communication of a first SIM overlaps with a scheduled paging monitoring activity for a second SIM. The multiple SIM device may preempt transitioning communication resources to the second SIM when the first SIM executes high priority communications. Or, the multiple SIM device may execute a rescheduling action to resolve the timing conflict. The high priority communication of the first SIM may be rescheduled. Alternatively, normal priority paging monitoring actions may be rescheduled to resolve the timing conflict.

20210110040, Apr 15, 2021

Oct 15, 2019

16/601633

- Armonk NY, US
Alper Buyuktosunoglu - White Plains NY, US
Tong Chen - Yorktown Heights NY, US

G06F 21/57
G06F 9/38
G06F 9/30

In an approach to protecting against out-of-bounds buffer references, an apparatus comprises one or more processor cores and a bounds-checking functional unit in each processor core configured to manage bounds information for one or more memory buffers. When a buffer is allocated, an address range of the buffer is stored. When a pointer is assigned an address within the address range of the buffer, the address range of the buffer is associated with the pointer. When the pointer is used to compute an address for an operation, whether the address for the operation is within the address range associated with the pointer is determined. If the address is not within the address range associated with the pointer, signaling that an error has occurred.