Sean Andre Lee

20130198494, Aug 1, 2013

Jan 30, 2012

13/361408

Vinod Grover - Mercer Island WA, US
Andrew Kerr - McDonough GA, US
Sean Lee - Redmond WA, US

G06F 9/318
G06F 9/38

712226, 712E09037, 712E09038

A technique is disclosed for executing a compiled parallel application on a general purpose processor. The compiled parallel application comprises parallel thread execution code, which includes single-instruction multiple-data (SIMD) constructs, as well as references to intrinsic functions conventionally available in a graphics processing unit. The parallel thread execution code is transformed into an intermediate representation, which includes vector instruction constructs. The SIMD constructs are mapped to vector instructions available within the intermediate representation. Intrinsic functions are mapped to corresponding emulated runtime implementations. The technique advantageously enables parallel applications compiled for execution on a graphics processing unit to be executed on a general purpose central processing unit configured to support vector instructions.

20130305233, Nov 14, 2013

Mar 25, 2013

13/850207

Sean Y. LEE - Redmond WA, US
Stephen JONES - San Francisco CA, US
Girish BHARAMBE - Pune, IN
Jaydeep MARATHE - San Jose CA, US

NVIDIA Corporation - Santa Clara CA

G06F 9/44

717162

Embodiments of the present invention provide a novel solution that supports the separate compilation of host code and device code used within a heterogeneous programming environment. Embodiments of the present invention are operable to link device code embedded within multiple host object files using a separate device linking operation. Embodiments of the present invention may extract device code from their respective host object files and then linked them together to form linked device code. This linked device code may then be embedded back into a host object generated by embodiments of the present invention which may then be passed to a host linker to form a host executable file. As such, device code may be split into multiple files and then linked together to form a final executable file by embodiments of the present invention.

20230051050, Feb 16, 2023

Aug 3, 2021

17/393246

- Santa Clara CA, US
Sean Youngsung Lee - Redmond WA, US

G06N 3/08

Apparatuses, systems, and techniques to detect loops in neural network graphs. In at least one embodiment, one or more loops are detected within one or more graphs corresponding to one or more neural networks.

20210049027, Feb 18, 2021

Aug 14, 2019

16/540294

- Bellevue WA, US
John Karlo Garcia - Bellevue WA, US
Vincent Chong - Bellevue WA, US
Sean Lee - Bellevue WA, US

G06F 9/455
H04L 29/12
H04L 12/46
H04L 12/26
G06F 11/14
G06F 11/07
H04L 12/24

Systems and methods for automated monitoring and troubleshooting of unknown dependencies in a virtual infrastructure are disclosed. In particular, systems and methods disclosed herein enable automation of processes for detecting network errors for virtual machines residing on virtual infrastructures and retrieving network addresses and physical ports associated with the errors. Aspects of the technology use the IEEE MAC address of the virtual instance to triage the L2 connectivity to determine the physical port to which the virtual instance is attached and then automatically report the port to the network operator. The system also provides a method of saving virtual instances that are in a faulty state so that instances can be investigated further by automated monitoring tools.

20200126112, Apr 23, 2020

Oct 17, 2018

16/163533

- Redmond WA, US
Theodore Charles VAN ZWOL, II - Redmond WA, US
Viktor VEIS - Redmond WA, US
Pavel USTINOV - Redmond WA, US
Wenying HU - Redmond WA, US
Tyler DUNKEL - Kirkland WA, US
Sean Hsi LEE - Seattle WA, US
Filip KRZEMINSKI - Sammamish WA, US
Kevin MEHLHAFF - Redmond WA, US
Eric Gordon KNOX - Redmond WA, US

G06Q 30/02
G06F 8/61

The present disclosure provides enhanced techniques for dynamically monitoring and controlling user experiences on a website based on user activity of associated software applications. A system can offer a number of web pages to different user groups in an experiment. Each web page can describe respective configurations of an application, and each user group may receive a particular web page based on one or more criteria. An application installer and a resource identifier are transmitted to the client device in response to an installation request. A configuration file is also delivered to the client device based on the resource identifier. The configuration file causes the installation of a particular application configuration on the client device. The application configuration sends telemetry data indicating user retention data to a service. A usage report summarizing the telemetry data is generated and utilized to adjust the criteria for controlling one or more experiments.

20190146766, May 16, 2019

Oct 8, 2018

16/154560

- Santa Clara CA, US
Sean Lee - Redmond WA, US
Vinod Grover - Mercer Island WA, US

G06F 8/41
G06F 16/901
G06F 16/903

System and method of compiling a program having a mixture of host code and device code to enable Profile Guided Optimization (PGO) for device code execution. An exemplary integrated compiler can compile source code programmed to be executed by a host processor (e.g., CPU) and a co-processor (e.g., a GPU) concurrently. The compilation can generate an instrumented executable code which includes: profile instrumentation counters for the device functions; and instructions for the host processor to allocate and initialize device memory for the counters and to retrieve collected profile information from the device memory to generate instrumentation output. The output is fed back to the compiler for compiling the source code a second time to generate optimized executable code for the device functions defined in the source code.

20180203673, Jul 19, 2018

Jan 16, 2018

15/872663

- Santa Clara CA, US
Vinod GROVER - Mercer Island WA, US
Evghenii GABUROV - Santa Clara CA, US
Alberto MAGNI - Berlin WA, US
Sean LEE - Bothell WA, US

G06F 8/36
G06F 17/30
G06N 99/00

A computation graph is accessed. In the computation graph, operations to be performed are represented as interior nodes, inputs to the operations are represented as leaf nodes, and a result of the operations is represented as a root. Selected sets of the operations are combined to form respective kernels of operations. Code is generated execute the kernels of operations. The code is executed to determine the result.

20140164727, Jun 12, 2014

Dec 12, 2012

13/712897

- Santa Clara CA, US
Vinod Grover - Mercer Island WA, US
Sean Youngsung Lee - Redmond WA, US

NVIDIA Corporation - Santa Clara CA

G06F 12/02

711170

A system, method, and computer program product for optimizing thread stack memory allocation is disclosed. The method includes the steps of receiving source code for a program, translating the source code into an intermediate representation, analyzing the intermediate representation to identify at least two objects that could use a first allocated memory space in a thread stack memory, and modifying the intermediate representation by replacing references to a first object of the at least two objects with a reference to a second object of the at least two objects.