Search

Phong Duc Do

from San Diego, CA
Age ~66
Get Report
Also known as:
Phong D Do, Thong D Do, Duc Phong Do, Phong Duc, Phong Ddo, Do Phong Duc, Duc Phong
Phone and address:
13969 Kunde Ct, San Diego, CA 92130
(858) 365-7415
Related to:
Son Xuan Do, 60Hwa Jung, 45So Kim, 90Kim Young, 72Moo Jung, 47
Connected to:
Adrian P Do, 50Akira Do, 62Anhloan T Do, 56Ba Do, 46Benjamin Do, 50Bonnie Do, 41Brian V Do, 45Brillian C Do, 71Camloan T Do, 62Canto J Do, 59

Phong Do Phones & Addresses

  • 13969 Kunde Ct, San Diego, CA 92130 (858) 365-7415
  • Coronado, CA
  • El Mirage, CA
  • Vancouver, WA
  • El Cajon, CA
  • La Mirada, CA
  • Hillsboro, OR
  • San Bernardino, CA

Professional Records

Medicine Doctors

Phong Do Photo 1

Phong Thanh Dao DO, San Diego CA

View page
Specialties:
Family Medicine
General Practice
Internal Medicine
Work:
Internal Medicine Group
9225 Mira Mesa Blvd, San Diego, CA 92126
Education:
New York Institute of Technology

License Records

Phong John Do

License #:
PNT.047267 - Active
Issued Date:
Oct 1, 2013
Expiration Date:
Oct 1, 2018
Type:
Pharmacy Intern

Resumes

Resumes

Phong Do Photo 2

Phong Do

View page
Location:
San Diego, CA
Industry:
Defense & Space
Work:
Naval Air Systems Command (Navair)
Electronics Engineer
Phong Do Photo 3

Phong Do

View page
Phong Do Photo 4

Phong Do

View page
Phong Do Photo 5

Phong Do

View page
Phong Do Photo 6

Professional Daytrade

View page
Work:
Do Daytrading
Professional Daytrade
Phong Do Photo 7

Dental Laboratory Technician

View page
Work:

Dental Laboratory Technician
Phong Do Photo 8

Electronics Engineer At Department Of Navy

View page
Position:
Electronics Engineer at Department of Navy
Location:
Greater San Diego Area
Industry:
Aviation & Aerospace
Work:
Department of Navy
Electronics Engineer
Phong Do Photo 9

Phong Do

View page
Location:
United States

Publications

Us Patents

Multi-Layer Registration And Dimensional Test Mark For Scatterometrical Measurement

View page
US Patent:
7492049, Feb 17, 2009
Filed:
Jun 26, 2007
Appl. No.:
11/768725
Inventors:
Phong Thanh Do - Camas WA, US
Kirk Rolofson - Gresham OR, US
David Sturdevant - Gresham OR, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
H01L 23/544
US Classification:
257797, 257E23
Abstract:
A layered test pattern for measuring registration and critical dimension (CD) for multi-layer semiconductor integrated circuits is disclosed. A first layer includes a first pattern having vertical and horizontal portions. A second layer is formed over the first layer and includes a second pattern having vertical and horizontal portions having nominal vertical and horizontal phase shifts with respect to the vertical and horizontal portions, respectively, of the first pattern. The vertical and horizontal portions include periodically repeating vertical lines and horizontal lines, respectively. The nominal phase shifts may be half of the period of the vertical and horizontal lines. A scatterometry tool measures the width of the lines and the phase shift of the first pattern relative to the second pattern. The width of the lines corresponds to CD, whereas the difference between the measured phase shift and the nominal phase shift indicates variation in registration.

Multi Wavelength Mask For Multi Layer Printing On A Process Substrate

View page
US Patent:
7550236, Jun 23, 2009
Filed:
Sep 29, 2004
Appl. No.:
10/953322
Inventors:
Duane B. Barber - Portland OR, US
Phong T Do - Camas WA, US
Douglas M. Horn - Portland OR, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G03F 1/00
G03F 1/14
US Classification:
430 5
Abstract:
A mask for exposing a first layer and a second layer on a process substrate, where the first and second layers are two separate layers of an integrated circuit. The mask includes a mask substrate that is substantially completely transmissive to a first wavelength of light and a second wavelength of light. A layer of a first material is disposed on the mask substrate, where the first material is substantially opaque to the first wavelength of light. The layer of the first material is patterned for the first layer. A layer of a second material is disposed on the mask substrate, where the second material is substantially opaque to the second wavelength of light. The layer of the second material is patterned for the second layer, where the layer of the first material and the layer of the second material are aligned on the mask substrate for proper alignment of the first and second layers on the process substrate.

Multi Reticle Exposures

View page
US Patent:
20060127823, Jun 15, 2006
Filed:
Dec 14, 2004
Appl. No.:
11/011823
Inventors:
David Sturtevant - Gresham OR, US
Phong Do - Gresham OR, US
Dodd Defibaugh - Gresham OR, US
International Classification:
G03F 7/20
US Classification:
430394000, 430396000
Abstract:
A method and file structure for exposing images from a plurality of reticles onto a wafer. Multiple images are effectively merged into the same file, which means the wafer need not be unloaded from a stage while exposing multiple reticles. For example, every odd numbered column can contain images from one reticle, and every even numbered column can contain images from a second reticle, where image shifts are used to align the patterns exactly. A continuous pattern is utilized to mimic normal wafer processing.

Multi-Layer Registration And Dimensional Test Mark For Scatterometrical Measurement

View page
US Patent:
20060172447, Aug 3, 2006
Filed:
Jan 28, 2005
Appl. No.:
11/046150
Inventors:
Phong Do - Camas WA, US
Kirk Rolofson - Gresham OR, US
David Sturtevant - Gresham OR, US
Assignee:
LSI LOGIC CORPORATION - Milpitas CA
International Classification:
H01L 21/00
US Classification:
438027000
Abstract:
A layered test pattern for measuring registration and critical dimension (CD) for multi-layer semiconductor integrated circuits is disclosed. A first layer includes a first pattern having vertical and horizontal portions. A second layer is formed over the first layer and includes a second pattern having vertical and horizontal portions having nominal vertical and horizontal phase shifts with respect to the vertical and horizontal portions, respectively, of the first pattern. The vertical and horizontal portions include periodically repeating vertical lines and horizontal lines, respectively. The nominal phase shifts may be half of the period of the vertical and horizontal lines. A scatterometry tool measures the width of the lines and the phase shift of the first pattern relative to the second pattern. The width of the lines corresponds to CD, whereas the difference between the measured phase shift and the nominal phase shift indicates variation in registration.

Grid Optimization Resource Dispatch Scheduling

View page
US Patent:
20130289772, Oct 31, 2013
Filed:
Mar 14, 2013
Appl. No.:
13/803816
Inventors:
Eric Pierce - Portland OR, US
Jason Hill - Portland OR, US
James Tillett - Portland OR, US
Dave Walden - Long Beach CA, US
Laura Raymond - Houston TX, US
Chris Hickman - Austin TX, US
Phong Do - Austin TX, US
Assignee:
INNOVARI, INC. - Austin TX
International Classification:
G05B 13/02
US Classification:
700276, 700296, 700291
Abstract:
Data comprising a request specifying a desired change in electrical load for a defined period of time is received. The electrical load is associated with a plurality of resources under control of resource agents and on a utility grid. Available capacity of resources within the control of each resource agent over the defined period of time is determined. Each available capacity is determined at least using a resource load model. Using the determined available capacity of resources over the defined period of time, resource scheduling instructions are calculated for a subset of resources. The resource scheduling instructions satisfy the desired change in electrical load of the request. Data characterizing the resource scheduling instructions is provided. Related systems, apparatus, methods, and articles are also described.

Grid Optimization Resource Dispatch Scheduling

View page
US Patent:
20140222238, Aug 7, 2014
Filed:
Mar 14, 2014
Appl. No.:
14/211045
Inventors:
- Austin TX, US
Eric Pierce - Portland OR, US
Jason Hill - Portland OR, US
James Tillett - Portland OR, US
David Walden - Long Beach CA, US
Laura V. Raymond - Houston TX, US
Chris Hickman - Austin TX, US
Phong Do - Austin TX, US
Assignee:
INNOVARI, INC. - Austin TX
International Classification:
G05B 13/02
US Classification:
700296
Abstract:
Data comprising a request specifying a desired change in electrical load for a defined period of time is received. The electrical load is associated with a plurality of resources under control of resource agents and on a utility grid. Available capacity of resources within the control of each resource agent over the defined period of time is determined. Each available capacity is determined at least using a resource load model. Using the determined available capacity of resources over the defined period of time, resource scheduling instructions are calculated for a subset of resources. The resource scheduling instructions satisfy the desired change in electrical load of the request. Data characterizing the resource scheduling instructions is provided. Related systems, apparatus, methods, and articles are also described.
Control profile
Phong Duc Do from San Diego, CA, age ~66 Get Report