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Martin Choy Phones & Addresses

  • San Francisco, CA
  • Millbrae, CA
  • Eagle Lake, FL
  • San Diego, CA
  • Santa Cruz, CA
  • Burlingame, CA
  • Fairfield, CA
  • San Mateo, CA

Professional Records

Medicine Doctors

Martin Choy Photo 1

Martin Frank Choy

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Specialties:
Ophthalmology
Surgery
Education:
Columbia University (1960)

Resumes

Resumes

Martin Choy Photo 2

Oracle Financials Developer At Visa

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Position:
P2P Developer at Visa
Location:
San Francisco Bay Area
Industry:
Computer Software
Work:
Visa since Mar 2011
P2P Developer

Visa Jan 2009 - Jul 2009
iProcurement AME Developer

VMware Jan 2007 - May 2008
Principal Oracle Financials System Analyst and Developer

Stanford University Jan 2003 - Sep 2006
Oracle Finacials Senior Software Developer P2P
Martin Choy Photo 3

Martin Choy

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Martin Choy
President
TYMART SOLUTIONS, INC
Business Consulting Services · Nonclassifiable Establishments
1550 Los Altos Dr, Burlingame, CA 94010
Martin F. Choy
President
MARTIN F. CHOY, M.D., INC
305 S Dr RM 4, Mountain View, CA 94040

Publications

Us Patents

Systems And Methods For Improved Semiconductor Etching And Component Protection

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US Patent:
20170338133, Nov 23, 2017
Filed:
May 19, 2016
Appl. No.:
15/159478
Inventors:
- Santa Clara CA, US
Lok Kee Loh - San Francisco CA, US
Dmitry Lubomirsky - Cupertino CA, US
Soonwook Jung - Palo Alto CA, US
Martin Yue Choy - Pacifica CA, US
Soonam Park - Sunnyvale CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/67
H01J 37/32
H01L 21/3065
Abstract:
Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.

Systems And Methods For Improved Semiconductor Etching And Component Protection

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US Patent:
20170338134, Nov 23, 2017
Filed:
May 19, 2016
Appl. No.:
15/159530
Inventors:
- Santa Clara CA, US
Lok Kee Loh - San Francisco CA, US
Dmitry Lubomirsky - Cupertino CA, US
Soonwook Jung - Palo Alto CA, US
Martin Yue Choy - Pacifica CA, US
Soonam Park - Sunnyvale CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/67
H01L 21/3065
H01J 37/32
H01L 21/324
Abstract:
Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.
Martin Scott Choy from San Francisco, CA, age ~63 Get Report