Search

Lin L Zhou

from Saratoga, CA
Age ~58
Get Report
Also known as:
Lin H Zhou, Steven Zhou, Lz Zhou Lin, Lin Z Hou, Zhou Lin Lei, Zhou Lin Lz, Zhou L Lei
Related to:
Yi Hsuan TsaiSteven ZhouMin Yang Hou, 62Yang Lin Xiang, 62Sanwin San, 72Cynthia Lin, 48Richard C Lin, 31Hsin Yi LinMichelle J Lin, 27Hongchao YangSteven Haonan Zhou, 31Linwan Shen Wan, 78Lin YangSan L Lin, 71Julia H Mercado, 48Jinjun Zhou, 52Jun Liu, 56
Connected to:
Adele D Zhou, 36Andi Zhou, 42Becky Zhou, 53Bernard Zhou, 33Binling Zhou, 52Bishan Zhou, 54Cai Zhou, 67Cheng C Zhou, 56Chenlu Zhou, 35Chuan Zhou, 60

Lin Zhou Phones & Addresses

  • Saratoga, CA
  • 5669 Goldfield Dr, San Jose, CA 95123 (408) 688-6785
  • 1106 Derbyshire Dr, Cupertino, CA 95014 (408) 996-7908
  • 4747 30Th St, Seattle, WA 98105 (206) 526-0629
  • 2508 Millwood Ct, Chapel Hill, NC 27514
  • 106 Misty Woods Cir, Chapel Hill, NC 27514

Professional Records

License Records

Lin Zhou

License #:
239021977 - Expired
Issued Date:
Dec 18, 2009
Expiration Date:
Sep 30, 2012
Type:
Registered Certified Public Accountant

Lin Zhou

License #:
53321 - Active
Category:
Professional
Issued Date:
Feb 28, 2012
Expiration Date:
Jun 30, 2018

Lawyers & Attorneys

Lin Zhou Photo 1

Lin Zhou - Lawyer

View page
Office:
Lehman, Lee & Xu
Specialties:
Intellectual Property
ISLN:
916337344
Admitted:
China
University:
China University of Political Science and Law, Ph.D., 1985

Business Records

Name / Title
Company / Classification
Phones & Addresses
Lin Zhou
Product Manager
First Virtual Properties LLC
Real Estate Managers
2207 Bridgepointe Pkwy, San Mateo, CA 94404
Lin Yi Zhou
President
LINYI COMPANY
5007 Autumn Gold Cmn, Fremont, CA 94536

Publications

Us Patents

Transceiver Architecture For Supporting Multi-Band Rf

View page
US Patent:
7532867, May 12, 2009
Filed:
Mar 15, 2006
Appl. No.:
11/377695
Inventors:
Shih Mo - Milpitas CA, US
Junjie Yang - Santa Clara CA, US
Lin Zhou - Milpitas CA, US
Chung-Hsing Chang - Milpitas CA, US
Ted Hsiung - Saratoga CA, US
International Classification:
H04B 1/44
H04Q 7/20
US Classification:
455 78, 4551274, 4555521
Abstract:
Transceiver architectures for supporting multi-band radio frequencies are disclosed. According to one aspect of the present invention, a number of processing channels are designed, each for one specified carrier frequency. A number of switching means is provided to ensure that a processing channel is properly selected for a specified carrier frequency. Each of the processing channels includes at least an amplified and a low-pass filter, where the low-pass filter is automatically programmable in response to a wireless standard (e. g. , Wi-Fi or WiMAX). A single voltage oscillator (VCO) is used to support operations of each of the processing channels.

Hybrid Concurrent And Switched Dual-Band Low Noise Amplifier

View page
US Patent:
20080258817, Oct 23, 2008
Filed:
Apr 17, 2007
Appl. No.:
11/736446
Inventors:
Lin Zhou - Chapel Hill NC, US
Shih Mo - Milpitas CA, US
Assignee:
RedDot Wireless Inc. - Milpitas CA
International Classification:
H03G 3/10
US Classification:
330279, 330278, 330285
Abstract:
The present invention provides a system and method for operating hybrid concurrent and switched dual-band low noise amplifiers. Embodiments use a concurrent design at the input block of a hybrid LNA to advantageously achieve better impedance matching while using a switch capacitor design at the output block to advantageously achieve a better gain than typical concurrent multiband LNAs. Embodiments might be integrated into wireless devices configured to simultaneously receive on multiple frequency bands while providing gains of 30 dB or more by combining the advantages of concurrent multiband LNAs with the advantages of switched multiband LNAs. In addition to the higher gains provided by embodiments of the hybrid LNA described herein, hybrid multiband LNAs according to embodiments of the present invention provide a smaller device footprint and power requirements than would be required for a receiver including multiple single-band LNAs for amplifying signals for each frequency band individually.

Cmos Triple-Band Rf Vga And Power Amplifier In Linear Transmitter

View page
US Patent:
20080258821, Oct 23, 2008
Filed:
Apr 17, 2007
Appl. No.:
11/736450
Inventors:
Lin Zhou - Chapel Hill NC, US
Assignee:
RedDot Wireless Inc. - Milpitas CA
International Classification:
H03F 3/04
US Classification:
330310, 330133
Abstract:
Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals.

In Situ Technique For Monitoring And Controlling A Process Of Chemical-Mechanical-Polishing Via A Radiative Communication Link

View page
US Patent:
60105380, Jan 4, 2000
Filed:
Jan 11, 1996
Appl. No.:
8/585164
Inventors:
Mei H. Sun - Los Altos CA
Herbert E. Litvak - Cupertino CA
Huey M. Tzeng - San Jose CA
Daniel E. Glenn - Mountain View CA
Earl M. Jensen - Sunnyvale CA
Frank J. Hausman - San Francisco CA
Lin Jun Zhou - Palo Alto CA
Assignee:
Luxtron Corporation - Santa Clara CA
International Classification:
H05K 304
B24B 704
US Classification:
756345
Abstract:
In an apparatus for removing material from an article, such as an exposed surface of an intermediate integrated circuit structure, by planarizing, polishing, etching or the like, a sensor is mechanically coupled to a moving carrier of the article for directing through the article to its first side an electromagnetic radiation beam having a wavelength band to which the structure is substantially transparent. The beam is detected after interacting with the article, such as being reflected from its exposed surface, and resulting information of the state of the processing of the exposed surface is transmitted from the moving carrier to a stationary receiver by radiation without the use of any physical transmission media such as wires or optical fibers. Multiple sensors mounted on the moving article carrier provide information of the uniformity of the processing across the exposed article surface. The radiation signal received by the stationary receiver is used to monitor or control the processing, such as by determining an endpoint thereof.

Methods For Reducing Transfer Pattern Defects In A Semiconductor Device

View page
US Patent:
20200357639, Nov 12, 2020
Filed:
Jul 30, 2020
Appl. No.:
16/944051
Inventors:
- Santa Clara CA, US
Steven R. Sherman - Newton MA, US
Nadine Alexis - Santa Clara CA, US
Lin Zhou - San Jose CA, US
Assignee:
APPLIED Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/033
H01L 21/311
Abstract:
Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.

Methods For Reducing Transfer Pattern Defects In A Semiconductor Device

View page
US Patent:
20200294802, Sep 17, 2020
Filed:
Jun 21, 2019
Appl. No.:
16/448374
Inventors:
- Santa Clara CA, US
Steven R. Sherman - Newton MA, US
Nadine Alexis - Santa Clara CA, US
Lin Zhou - San Jose CA, US
Assignee:
APPLIED Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/033
H01L 21/311
Abstract:
Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.

Method For Patterning A Material Layer With Desired Dimensions

View page
US Patent:
20190348279, Nov 14, 2019
Filed:
May 9, 2018
Appl. No.:
15/975408
Inventors:
- Santa Clara CA, US
Lin ZHOU - Santa Clara CA, US
International Classification:
H01L 21/027
H01L 21/311
H01L 21/3213
C23C 16/455
H01L 21/683
Abstract:
Methods for patterning a film stack are provided. In one embodiment, a method for patterning a film stack disposed on a substrate includes performing a first etching process to etch a film stack disposed on a substrate, wherein the film stack includes a patterned photoresist layer disposed on an upper layer on a lower layer disposed on the substrate, wherein the patterned photoresist layer comprises openings defined between features and the features have a first pitch, wherein the first etching process removes between about 40 percent and about 95 percent of the lower layer exposed by the patterned photoresist layer from the film stack, performing a second etching process on the film stack, and upon completion of the second etching process, transferring the features into the upper or lower layer in the film stack having a second pitch, wherein the second pitch is shorter than the first pitch.
Control profile
Lin L Zhou from Saratoga, CA, age ~58 Get Report