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Luan Thien Bui

from Highland, NY
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Also known as:
Luan T Bui, Luan L Bui, Luam T Bui, Luanl Bui
Phone and address:
14 Diana Rdg, Highland, NY 12528
(845) 505-2258
Related to:
Judy Dang, 32Hoang Nguyen, 59Thomas Duong, 50Tam Tran, 50Long Bui, 35
Connected to:
Agnes Bui, 38Amy Bui, 47Angelina H Bui, 38Anita Bui, 45Anne K Bui, 52Anvi C Bui, 36Ben V Bui, 41Bichvan T Bui, 50Cam V Bui, 77Carol P Bui, 67

Luan Bui Phones & Addresses

  • 14 Diana Rdg, Highland, NY 12528 (845) 505-2258
  • Poughkeepsie, NY
  • San Francisco, CA
  • San Jose, CA
  • 124 Burnside Ave, Bronx, NY 10453 (718) 466-6226

Business Records

Name / Title
Company / Classification
Phones & Addresses
Luan Bui
Principal
Krua Thai Kitchen
Eating Place · Nonclassifiable Establishments
3214 16 St, San Francisco, CA 94103
Luan Phan Bui
Director, Vice President
Anything Upholstery, Inc
Luan Bui
Principal
Humble Krua
Nonclassifiable Establishments
22 Gardenside Dr, San Francisco, CA 94131

Publications

Us Patents

Embedded Cache Manager

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US Patent:
61417289, Oct 31, 2000
Filed:
Jun 7, 1999
Appl. No.:
9/327293
Inventors:
Horia Cristian Simionescu - Foster City CA
Luan Kha Bui - Fremont CA
James A. Henson - Bend OR
Clifford M. Gold - Fremont CA
Assignee:
Quantum Corporation - Milpitas CA
International Classification:
G06F 1212
US Classification:
711113
Abstract:
A method for managing data blocks in a cache buffer defining date block segments, and for automatically transferring data into and out of the cache buffer. A cache list comprises a plurality of entries each including information identifying a corresponding cache segment, and a set of consecutive data blocks stored in the cache segment. Providing cache status for a requested set of date blocks includes traversing the cache list to locate entries identifying the starting data block in the requested set, and consecutive data blocks successively following the starting data block without interruption, and identifying as a missing data block the first data block in said succession, including said starting data block, not identified in any entry. The missing data block is used to provide status: a full hit if the missing data block is not in the requested set; a miss if the missing data block is the starting data block in the requested set, or a partial hit otherwise. In response to a write command for a new set of data, the cache list is traversed to locate all entries identifying sets of data blocks overlapping the new set.

Chained Command Architecture For Packet Processing

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US Patent:
20220337249, Oct 20, 2022
Filed:
Jul 1, 2022
Appl. No.:
17/855970
Inventors:
Sreedhar Ravipalli - Cupertino CA, US
Jing Miao - Livermore CA, US
Raghucharan Boddupalli - Bangalore, IN
Luan Bui - San Jose CA, US
Dinesh Kotti - Saratoga CA, US
Ranjini Rajeevan - Fremont CA, US
International Classification:
H03K 19/17736
H03K 19/17704
Abstract:
Systems or methods of the present disclosure may include a programmable logic device having a first portion of programmable elements configured to implement a user logic. The programmable logic device also includes a second portion of the programmable elements. The second portion is configured to implement an infrastructure processing unit (IPU) to enable the first portion of programmable elements to interface with a plurality of accelerator engines. The IPU is to receive a chained command to cause two or more accelerator engines of the plurality of accelerator engines to perform sequential operations on a data packet in response to the chained command.
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Luan Thien Bui from Highland, NY Get Report