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An V Le

from Alameda, CA
Age ~94

An Le Phones & Addresses

  • 620 Pacific Ave, Alameda, CA 94501 (510) 769-9046
  • Oakland, CA

Resumes

Resumes

An Le Photo 1

An Le San Jose, CA

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Work:
Atspid

PCB layout design

GES
San Jose, CA
2008 to 2011
Field Service Engineer

Fujitsu

2005 to 2008
PCB Design Engineer, Vietnam

Education:
Northwestern Polytechnic University
Fremont, CA
2011
MBA

Pedagogic Technical University
Jun 2005
BSEE

An Le Photo 2

An Le San Jose, CA

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Work:
Global Equipment Services
Fremont, CA
2008 to 2011
Field Service Engineer

Fujitsu, Ho Chi Minh City, Vietnam

2005 to 2008
PCB Design Engineer

Education:
Northwestern Polytechnic University
Fremont, CA
2011
MBA in Project Management

National University
Jun 2007
BA

Pedagogic Technical University
Jun 2005
BSEE

Publications

Us Patents

System And Method For Providing An Integrated Gas Stick

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US Patent:
62831437, Sep 4, 2001
Filed:
Mar 31, 2000
Appl. No.:
9/540152
Inventors:
Richard S. Adachi - Fremont CA
An Le - San Jose CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
F16K 4900
US Classification:
137341
Abstract:
The present invention discloses a gas delivery apparatus for control of process and purge gases is disclosed that is suitable for use in a semiconductor processing system. The gas delivery apparatus includes a base plate integrating a printed circuit board and a heating layer. In addition, the gas delivery apparatus includes a plurality of gas stick components mounted on the base plate. Specific gas components are coupled to the integrated printed circuit board, which provides an electrical interface to the control electronics.

Dynamic Configuration Of A Secure Processing Unit For Operations In Various Environments

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US Patent:
58839569, Mar 16, 1999
Filed:
Mar 28, 1996
Appl. No.:
8/625537
Inventors:
An Van Le - Sunnyvale CA
William B. Sweet - Morgan Hill CA
Howard Crompton Herbert - Phoenix AZ
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H04L 900
US Classification:
380 4
Abstract:
A technique to dynamically configure a Secure Processing Unit (SPU) chip in a secure manner using a capability table, which defines the functions that an SPU can perform. The capability table employs a digital signature to ensure the authenticity of the source and contents of the table. It also contains information which identifies the SPU for which the table is intended and a time-stamp indicating the time by which the table must be loaded into an SPU.

Scalable Framework For Monitoring Machine-To-Machine (M2M) Devices

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US Patent:
20150271033, Sep 24, 2015
Filed:
Mar 20, 2014
Appl. No.:
14/220300
Inventors:
- Basking Ridge NJ, US
Kalyan PAMARTHY - San Francisco CA, US
Santanu DAS - Sunnyvale CA, US
Yunzhu CHEN - Mountain View CA, US
An LE - San Mateo CA, US
Xuepeng SUN - Wellesley MA, US
Assignee:
Verizon Patent and Licensing Inc. - Basking Ridge NJ
International Classification:
H04L 12/26
Abstract:
A device receives information associated with machine-to-machine (M2M) devices connected to a host server device via a network. The information associated with the M2M devices include one or more of device information associated with components of the M2M devices, application information generated by the M2M devices, or network information associated with interactions of the M2M devices, with the network, when the M2M devices provide the application information to the host server device via the network. The device performs an analysis of the information associated with the M2M devices via one or more analytics techniques, and generates analysis information based on the analysis of the information associated with the M2M devices. The device provides the analysis information for display by the host server device.
An V Le from Alameda, CA, age ~94 Get Report