Lan Ma Ling Zhang

6428906, Aug 6, 2002

May 30, 2000

09/583317

Bunsen Y. Wong - San Diego CA
Lan Zhang - Fremont CA

Maxtor Corporation - Longmont CO

G11B 564

428611, 428650, 428668, 428694 TS, 2041922

A magnetic recording medium such as a magnetic disk comprises a substrate of NiP or ceramic glass on which is sputtered an underlayer of TiAl or other alloy which has a L structure or a disordered fcc structure. A magnetic layer of a cobalt alloy is then sputtered on the underlayer with the magnetic layer having a magnetization which is perpendicular to the layer. A carbon overcoat can be sputtered on the cobalt alloy magnetic layer with a lubricant layer deposited on the carbon overcoat.

6762368, Jul 13, 2004

Jul 13, 2001

09/905474

Stephanus D. Saputro - Austin TX
Lan Zhang - Austin TX

Dell Products L.P. - Round Rock TX

H05K 706

174260, 174255, 361794

The inductance of the capacitor is reduced by connecting the capacitor directly to a via. In one embodiment inductance of a capacitor is reduced by a plurality of via, the number of via greater than the number of electrical couplings from the voltage pad to the voltage plane. In one embodiment the capacitor has a ground pad of a minimum size. In another embodiment the capacitor is electrically coupled to a trace having a length reduced to minimize inductance.

6801880, Oct 5, 2004

Jul 2, 2002

10/187927

Lan Zhang - Austin TX
Abeye Teshome - Austin TX

Dell Products L.P. - Round Rock TX

G06F 1750

703 1, 29593

An information handling system that includes a circuit board for mounting and coupling components of the information handling system. The circuit board includes a trace, a via coupled to the trace, and a cutout region surrounding the via and having a first diameter selected to minimize a loading effect of a via on a signal conveyed on the trace.

6968304, Nov 22, 2005

Jan 23, 2001

09/768083

Lan Zhang - Austin TX, US
Ray Wang - Austin TX, US

Dell Products L.P. - Round Rock TX

G06F017/50

703 13

The disclosure relates to a method for calculating electromagnetic radiation emitted by a computer system. The method models the characteristic radiation from a central processing unit as a modulated Gaussian pulse. The method solves Maxwell's equation using finite differences in the time domain. After solving Maxwell's equation the method determines if the radiation emitted by the heat sink is capacitively coupled to the radiation emitted by the remaining components of the computer system. The method also determines whether radiation emitted by the heat sink is inductively coupled to the radiation emitted by the remaining components of the computer system. Finally, the method uses a fast Fourier transform to translate time domain data to the frequency domain. The method also teaches using a computer system, with instructions coded on a computer readable medium to make the calculations described.

7305760, Dec 11, 2007

Aug 24, 2004

10/924629

Abeye Teshome - Austin TX, US
Lan Zhang - Austin TX, US

Dell Products L.P. - Round Rock TX

H01R 43/00
H05K 13/00

29831, 29854

Power supplied to an information handling system electronic component through a circuit board has component package inductance parasitic effects compensated by configuring connections to the electronic component to have increased parasitic capacitance. For instance, power and ground vias that connect a processor to power and ground planes of the circuit board are aligned to create a desired parasitic capacitance that reduces the impact of parasitic inductance relating to signal compensation, power delivery and high speed decoupling. The desired distributed capacitance is modeled by altering the radius associated with the equivalent line charge of the power via, the distance associated with the line charges between power and ground vias, and the via barrel length.

20080032404, Feb 7, 2008

Jul 19, 2007

11/780132

Frederick Roth - Newton MA, US
Oliver King - Somerville MA, US
Lan Zhang - San Francisco CA, US

President and Fellows of Harvard College - Cambridge MA

C12N 15/87

435440000

The present invention provides methods for engineering multiple genomic deletions and/or insertions in eukaryotic cells.

20080277153, Nov 13, 2008

Oct 31, 2007

11/931698

Abeye Teshome - Austin TX, US
Lan Zhang - Austin TX, US

H01R 12/06

174262

Power supplied to an information handling system electronic component through a circuit board has component package inductance parasitic effects compensated by configuring connections to the electronic component to have increased parasitic capacitance. For instance, power and ground vias that connect a processor to power and ground planes of the circuit board are aligned to create a desired parasitic capacitance that reduces the impact of parasitic inductance relating to signal compensation, power delivery and high speed decoupling. The desired distributed capacitance is modeled by altering the radius associated with the equivalent line charge of the power via, the distance associated with the line charges between power and ground vias, and the via barrel length.

20130105930, May 2, 2013

Oct 27, 2011

13/283379

Lan Zhang - Palo Alto CA, US
Ewelina N. Lucow - Mountain View CA, US
Onur Fidaner - Sunnyvale CA, US
Michael W. Wiemer - Campbell CA, US

Solar Junction Corporation - San Jose CA

H01L 31/18
H01L 31/0216

257437, 438 72, 257E31119

A semiconductor light detection device fabrication technique is provided in which the cap etch and anti-reflection coating steps are performed in a single, self-aligned lithography module.