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Lan Lee Phones & Addresses

  • San Francisco, CA
  • San Rafael, CA

Professional Records

License Records

Lan Y. Lee

License #:
PST.013907 - Expired
Issued Date:
Jan 29, 1986
Expiration Date:
Dec 31, 1995
Type:
Pharmacist

Medicine Doctors

Lan Lee Photo 1

Lan Na Lee

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Specialties:
Obstetrics & Gynecology
Education:
Stony Brook University (2006)

Real Estate Brokers

Lan Lee Photo 2

Lan "Stefanie" Lee, Vallejo CA

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Specialties:
Buyer's Agent
Listing Agent
Work:
Crestiline Realty
320 Arkansas Street, Vallejo, CA 94590
(510) 326-2089 (Office)

Resumes

Resumes

Lan Lee Photo 3

Properties Asset Manager At Wells Fargo Bank

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Position:
Properties Asset Manager at Wells Fargo Bank
Location:
San Francisco Bay Area
Industry:
Banking
Work:
Wells Fargo Bank
Properties Asset Manager
Education:
California State University-East Bay
Lan Lee Photo 4

Properties Asset Manager At Wells Fargo Bank

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Position:
Properties Asset Manager at Wells Fargo Bank
Location:
San Francisco Bay Area
Industry:
Real Estate
Work:
Wells Fargo Bank
Properties Asset Manager
Education:
California State University-Hayward - School of Business and Economics 1987 - 1994
Lan Lee Photo 5

Summer Law Clerk At Santa Clara County District Attorney's Office

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Location:
San Francisco Bay Area
Industry:
Legal Services
Lan Lee Photo 6

Realtor/Loan Agent At Self

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Location:
San Francisco Bay Area
Industry:
Real Estate
Lan Lee Photo 7

Lan Lee

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Location:
United States
Lan Lee Photo 8

Independent Music Professional

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Location:
San Francisco Bay Area
Industry:
Music

Business Records

Name / Title
Company / Classification
Phones & Addresses
Lan Lee
Owner
Fancy Cuts
Beauty Salon
15251 Hesperian Blvd, San Leandro, CA 94578
(510) 276-5090
Lan Lee
Sse Investments LLC
816 Colorado Ave, Palo Alto, CA 94303

Publications

Us Patents

Voltage Multiplier For Low Voltage Microprocessor

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US Patent:
6430067, Aug 6, 2002
Filed:
Apr 12, 2001
Appl. No.:
09/834155
Inventors:
Lan Lee - Palo Alto CA
Assignee:
Sun Microsystems, Inc. - Palo Alto CA
International Classification:
H02M 318
US Classification:
363 60
Abstract:
A method and apparatus for a voltage multiplier is disclosed that includes a first stage for receiving an input voltage and a first control signal; inverting the first control signal to produce a second control signal; and outputting a first output voltage and the second control signal. The voltage multiplier also includes a second stage for receiving the first output voltage and the second control signal; and outputting a third output voltage. The first output voltage is higher than the input voltage and the second output voltage is higher than the first output voltage.

Device For Sensing Positions Of A Rotating Wheel

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US Patent:
20120176125, Jul 12, 2012
Filed:
Jan 12, 2011
Appl. No.:
13/005007
Inventors:
Lan Lee - Palo Alto CA, US
Shanshan Lee - Palo Alto CA, US
International Classification:
G01B 7/30
H02K 7/18
G01B 11/26
US Classification:
32420725, 35613909, 290 1 R
Abstract:
A device for sensing positions of a rotating wheel comprises a rotating wheel with a symmetrical weight distribution, with the rotating wheel being rigidly attached to an axle; a stationary plate coaxial with the rotating wheel, the stationary plate being free to rotate about the axle and having an asymmetrical weight distribution to keep the stationary plate stationary due to the forces of gravity; and a position sensor to sense positions of the rotating wheel.

Electricity Generating Bicycle Wheel Assemblies

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US Patent:
20120306327, Dec 6, 2012
Filed:
Jun 2, 2011
Appl. No.:
13/151824
Inventors:
Lan Lee - Palo Alto CA, US
Shanshan Lee - Palo Alto CA, US
International Classification:
B62J 6/12
H02K 7/18
US Classification:
310 67 A
Abstract:
Provided are electricity generating bicycle wheel assemblies configured to generate electrical power. In certain embodiments, an electricity generating bicycle wheel assembly includes a hub, and an axle protruding through and rotatably attached to the hub, such that the axle is configured to rigidly attach to a bicycle frame on each side of the hub. The assembly also includes an electrical generator positioned within the hub and rigidly attached to the axle. The electrical generator includes a generator axle rotatably coupled to the hub such that rotation of the hub with respect to the axle facilitates rotation of the generator axle with respect to the electrical generator.

Apparatus And Method For Comparing Digital Words Using A Last Bit Detection Operation

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US Patent:
61218715, Sep 19, 2000
Filed:
Mar 1, 1999
Appl. No.:
9/260583
Inventors:
Lan Lee - Palo Alto CA
Cong Khieu - San Jose CA
Assignee:
Sun Microsystems, Inc. - Palo Alto CA
International Classification:
G05B 100
US Classification:
3401462
Abstract:
A circuit for comparing two digital words has a set of bit compare circuits that generate a set of compare signals. Each bit compare circuit receives a first bit from a first digital word and a corresponding bit from a second digital word and generates one compare signal that indicates a match between the first bit and the corresponding bit. In response to the set of compare signals, a composite match detector circuit generates a composite match signal. A last bit detector circuit generates a last bit signal that indicates a match between a last bit from the first digital word and a last bit from the second digital word. When the last bit signal is received, a match hit generator circuit generates a match hit signal based on the composite match signal and the last bit signal.

Voltage Controlled Variable Current Reference

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US Patent:
57932484, Aug 11, 1998
Filed:
Jul 31, 1996
Appl. No.:
8/690008
Inventors:
Lan Lee - San Francisco CA
Saleel Awsare - San Francisco CA
Assignee:
Exel Microelectronics, Inc. - San Jose CA
International Classification:
H03K 301
US Classification:
327543
Abstract:
A current source providing a voltage-controlled variable-current reference is described which employs a conventional current mirror to supply a current to a diode-connected transistor, and to a plurality of controllable current paths, wherein the controllable current paths are controlled by voltages from a voltage sensing circuit so that predetermined amounts of current are drawn away from the diode-connected transistor as function of a controlled voltage, so that the diode-connected transistor generates a voltage as a function of the current flowing through it which voltage is used to control an output transistor and a current flowing through the output transistor.

Negative Pulse Edge Triggered Flip-Flop

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US Patent:
61631922, Dec 19, 2000
Filed:
Feb 26, 1999
Appl. No.:
9/259148
Inventors:
Lan Lee - Palo Alto CA
Hiep P. Ngo - Sunnyvale CA
Cong Khieu - San Jose. CA
Assignee:
Sun Microsystems, Inc. - Palo Alto CA
International Classification:
H03K 3356
US Classification:
327212
Abstract:
A negative edge triggered flip-flop generates an output pulse in response to a negative edge of a clock signal. A first set of nodes receives data input signals, and a second set of nodes receives select input signals for selecting one data input signal as a selected data input signal. The clock node receives the clock signal which has a positive edge and a negative edge. A header circuit connects to the second set of nodes and to the clock node, and integrates the clock signal with the select input signals to generate at least one control signal. A pulse generator circuit connects to the first set of nodes, the header circuit and the output node. The pulse generator circuit generates an output pulse on the output node in response to a control signal and the selected data input signal.

Display Control Circuit And Liquid Crystal On Silicon Panel

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US Patent:
20220254315, Aug 11, 2022
Filed:
Jan 18, 2022
Appl. No.:
17/577780
Inventors:
- Shenzhen, CN
Lan Lee - Palo Alto CA, US
International Classification:
G09G 3/36
G02F 1/1362
Abstract:
A display control circuit applies to a LCoS panel including pixel units and a substrate. The display control circuit includes a pixel memory array circuit and a driving circuit. The pixel memory array circuit includes pixel memory units. A projection of the pixel memory array circuit on the substrate is in a projection of the pixel units on the substrate. The driving circuit includes a row driving circuit and a column driving circuit. A projection of the driving circuit on the substrate is outside the projection of the pixel units on the substrate. The driving circuit provides a modulation signal and pixel data. The pixel memory array circuit modulates the pixel data by the modulation signal to provide a pixel display voltage to each of the pixel units.
Lan Yuen Lee from San Francisco, CA, age ~76 Get Report