Kwok S Lee from San Francisco, CA

Professional Records

Medicine Doctors

Dr. Kwok C Lee, Fremont CA - DC (Doctor of Chiropractic)

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Specialties:

Chiropractic

Address:

39159 Paseo Padre Pkwy Suite 101, Fremont, CA 94538
(510) 979-9659 (Fax)

Languages:

English

Kwok Cheung Lee

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Specialties:

Medical Oncology
Pediatric Gastroenterology
Radiation Oncology

Education:

University of Maryland(1979)

Kwok Ching Lee, Fremont CA

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Specialties:

Chiropractor

Address:

39159 Paseo Padre Pkwy, Fremont, CA 94538

Lawyers & Attorneys

Kwok Lee - Lawyer

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Office:

Lee & So

ISLN:

919751406

Admitted:

1997

Kwok Ting Lee - Lawyer

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Address:

Partners Group (Singapore) Pte Ltd
(945) 631-48xx (Office)

Licenses:

New York - Currently registered 2010

Education:

University of Sydney

Kwok Lee - Lawyer

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ISLN:

924344518

Admitted:

2010

Resumes

Kwok Lee

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Kwok Lee

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Kwok Lee

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Business Records

Name / Title

Company / Classification

Phones & Addresses

Kwok Yee Lee
Managing

Draco Electronics, LLC
Cable Assembly Trading and Manufacturing · Nonferrous Wiredrawing/Insulating · Ret Misc Merchandise

4588 Peralta Blvd, Fremont, CA 94536
39270 Paseo Padre Pkwy, Fremont, CA 94538
(510) 797-7113

Kwok Kie Lee
President

Cgl Capital Corporation

601 Montgomery St, San Francisco, CA 94111

Kwok Wing Lee
President

NEWTREK USA, INC

231 S Balsamina Way, Portola Valley, CA 94028

Kwok Woon Lee
President

LEE & CHAN INC

555 Montgomery St #838, San Francisco, CA 94111

Kwok Tai Lee
President

SUNNY TIME INTERNATIONAL, INC

350 Sansome St #1030, San Francisco, CA 94104

Kwok Wing Lee
President

AXON INDUSTRIES INC

389-9 St, Oakland, CA 94607
389 9 St, Oakland, CA 94607

Kwok Kay Lee
President

RENAISSANCE EXPRESS CORPORATION

PO Box 4381, Burlingame, CA 94011

Kwok Chi Lee

Fairlands Drive, LC
Apartments

911 Snow Dr, Pacheco, CA 94553

Publications

Us Patents

Simplifying Power Sequencing For Integrated Circuits

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US Patent:

20210405719, Dec 30, 2021

Filed:

Jun 25, 2020

Appl. No.:

16/912539

Inventors:

- Santa Clara CA, US
Venkata Suresh PERUMALLA - Fremont CA, US
Kwok San LEE - San Jose CA, US

International Classification:

G06F 1/26
G06F 13/40

Abstract:

In various embodiments, rail decoupling circuits that are powered by an always on voltage rail allow a core voltage rail to power up independently of an I/O voltage rail without jeopardizing I/O pad circuits that are powered by the I/O voltage rail. In an embodiment, when the always on voltage rail is powered-up and a chip reset signal is asserted, the rail decoupling circuits drive control inputs of the I/O pad circuits based on default values. When the chip reset signal is de-asserted, the rail decoupling circuits drive the control inputs of the I/O pad circuits based on signals received from circuits powered by the core voltage rail. Because the rail decoupling circuits maintain control of the I/O pad circuits until the chip-reset is de-asserted, the core voltage rail can power up at any time before the chip-reset signal is de-asserted irrespective of when the I/O voltage rail powers up.

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