Inventors:
Gwo-Chung Tai - San Jose CA, US
Kin Hui - San Jose CA, US
Assignee:
Micrel, Incorporated - San Jose CA
International Classification:
H03L 7/06
Abstract:
A delay-locked loop (DLL) employs an in-loop duty cycle corrector (DCC) to provide accurate multiphase clock generation with 50% duty cycle. Each delay cell can advantageously provide both delay and duty cycle correction functionality. In one embodiment, delay correction can precede duty cycle correction. The bandwidths of the DCC and the DLL can differ by a factor of a decade to achieve fast and stable operation.