Kim M Le

7701746, Apr 20, 2010

Jun 28, 2007

11/819561

Albert Meeks - Sunnyvale CA, US
Xiaoyu Yang - Campbell CA, US
Kim Le - San Jose CA, US

SanDisk 3D, LLC - Milpitas CA

G11C 11/00

365148, 36518528, 365163, 365171

A method of making a two terminal nonvolatile memory cell includes forming a first electrode, forming a charge storage medium, forming a resistive element, and forming a second electrode. The charge storage medium and the resistive element are connected in parallel between the first and the second electrodes, and a presence or absence of charge being stored in the charge storage medium affects a resistivity of the resistive element.

7944029, May 17, 2011

Sep 16, 2009

12/560727

Xiaoyu Yang - Campbell CA, US
Qing Li - San Jose CA, US
Albert Meeks - Sunnyvale CA, US
Kim Le - San Jose CA, US

SanDisk Corporation - Milpitas CA

H01L 23/48

257666, 257701, 257E23021, 438106, 438123

Mobile ion diffusion causes a shift in the threshold voltage of non-volatile storage elements in a memory chip, such as during an assembly process of the memory chip. To reduce or avoid such shifts, a coating can be applied to a printed circuit board substrate or a leader frame to which the memory chip is surface mounted. An acrylic resin coating having a thickness of about 10 μm may be used. A memory chip is attached to the coating using an adhesive film. Stacked chips may be used as well. Another approach provides metal barrier traces over copper traces of the printed circuit board, within a solder mask layer. The metal barrier traces are fabricated in the same pattern as the copper traces but are wider so that they at least partially envelop and surround the copper traces. Corresponding apparatuses and fabrication processes are provided.

8179717, May 15, 2012

Sep 29, 2009

12/569869

Zac Shepard - San Jose CA, US
Xiaoyu Yang - Campbell CA, US
Albert Meeks - Sunnyvale CA, US
Qing Li - San Jose CA, US
Enosh Levi - Sunnyvale CA, US
Kim Le - San Jose CA, US
Raz Dan - San Jose CA, US
Brian Murphy - San Jose CA, US

SanDisk Technologies Inc. - Plano TX

G11C 11/34
G11C 16/04

36518502, 36518509, 438106

A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable.

20090003083, Jan 1, 2009

Jun 28, 2007

11/819562

Albert Meeks - Sunnyvale CA, US
Xiaoyu Yang - Campbell CA, US
Kim Le - San Jose CA, US

G11C 11/34

36518528, 365148

A two terminal nonvolatile memory cell includes a first electrode, a second electrode, a charge storage medium, and a resistive element. The charge storage medium and the resistive element are connected in parallel between the first and the second electrodes. A presence or absence of charge being stored in the charge storage medium affects a resistivity of the resistive element.