John M Lin

6815276, Nov 9, 2004

Oct 3, 2002

10/264038

Philip L. Hower - Concord MA
John Lin - Chelmsford MA
Sameer P. Pendharkar - Richardson TX
Steven L. Merchant - Bedford NH

Texas Instruments Incorporated - Dallas TX

H01L 21336

438197, 438294

Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and in which other electrical devices can be formed in the spaces between transistor segments.

6878999, Apr 12, 2005

Jul 15, 2003

10/619699

Philip L. Hower - Concord MA, US
John Lin - Chelmsford MA, US
Sameer Pendharkar - Richardson TX, US
Steven L. Jensen - Amherst NH, US

Texas Instruments Incorporated - Dallas TX

H01L029/76
H01L029/94
H01L031/062
H01L031/113
H01L031/119

257343, 257335, 257341

Segmented transistor devices are provided, wherein contiguous individual transistor segments extend along corresponding segment axes, in which two or more of the segment axes are at a non-zero angle with respect to one another. The segmentation of the transistor provides a high overall device aspect ratio which may be easily fit into pre-existing circuit blocks or cells in a device layout, thereby facilitating device scaling.

6900101, May 31, 2005

Jun 13, 2003

10/461214

John Lin - Chelmsford MA, US

Texas Instruments Incorporated - Dallas TX

H01L021/8236

438276, 438227, 438297, 438306, 438519, 438524, 257E21417

LDMOS transistor devices and fabrication methods are provided, in which additional dopants are provided to region of a substrate near a thick dielectric between the channel and the drain to reduce device resistance without significantly impacting breakdown voltage. The extra dopants are added by implantation prior to formation of the thick dielectric, such as before oxidizing silicon in a LOCOS process or following trench formation and before filling the trench in an STI process.

7187034, Mar 6, 2007

Jul 9, 2004

10/888776

Philip L. Hower - Concord MA, US
John Lin - Chelmsford MA, US
Sameer P. Pendharkar - Richardson TX, US
Steven L. Merchant - Bedford NH, US

Texas Instruments Incorporated - Dallas TX

H01L 29/78

257341, 257401, 257E2912, 257E29256

Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and in which other electrical devices can be formed in the spaces between transistor segments.

7195965, Mar 27, 2007

Nov 22, 2002

10/302256

John Lin - Chelmsford MA, US
Philip L. Hower - Concord MA, US
Taylor R. Efland - Richardson TX, US
Sameer Pendharkar - Richardson TX, US
Vladimir Bolkhovsky - Framingham MA, US

Texas Instruments Incorporated - Dallas TX

H01L 21/8248

438202, 438309

The concept of the present invention describes a semiconductor device with a junction between a lightly doped region and a heavily doped region , wherein the junction has an elongated portion and curved portions. The doping concentration of the lightly doped region is configured so that it exhibits higher resistivity in the proximity of the curved portion by an amount suitable to lower the electric field strength during device operation and thus to offset the increased field strength caused by the curved portion. As a consequence, the device breakdown voltage in the curved junction portion becomes equal to or greater than the breakdown voltage in the linear portion.

7417270, Aug 26, 2008

Jun 23, 2004

10/874479

Philip L. Hower - Concord MA, US
David A. Walch - Bedford NH, US
John Lin - Chelmsford MA, US
Steven L. Merchant - Bedford NH, US

Texas Instruments Incorporated - Dallas TX

H01L 29/80

257270, 257269, 257285, 257286, 257E27012

A Junction Field Effect Transistor (JFET) can be fabricated with a well region that include a channel region having an average dopant concentration substantially less the average doping concentration of the remaining portions of the well region. The lower average doping concentration of channel region compared to the remaining portions of the well region reduces the pinch-off voltage of the JFET.

7544659, Jun 9, 2009

Aug 13, 2004

10/917905

John (Chia-Yang) Lin - Mountain View CA, US
Arnon Rosenthal - Woodside CA, US

Genentech, Inc. - South San Francisco CA

A61K 38/17

514 12

The present invention concerns a method of promoting axonal regeneration. In particular, the invention concerns a method of promoting the growth or regeneration of neurons, and treating disease or conditions associated with the loss, loss of function or dysfunction of nerve cells, in particular thalamic nerve cells, by administering a polypeptide having a high degree of sequence identity with a native sequence Netrin G1 (NGL-1) or an agonist thereof.

7605412, Oct 20, 2009

Sep 22, 2006

11/534395

Philip L. Hower - Concord MA, US
David A. Walch - Bedford NH, US
John Lin - Chelmsford MA, US
Steven L. Merchant - Bedford NH, US

Texas Instruments Incorporated - Dallas TX

H01L 31/112

257270, 257285, 257E2163, 438186

A Junction Field Effect Transistor (JFET) can be fabricated with a well region that include a channel region having an average dopant concentration substantially less the average doping concentration of the remaining portions of the well region. The lower average doping concentration of channel region compared to the remaining portions of the well region reduces the pinch-off voltage of the JFET.