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Jin Han Phones & Addresses

  • Bayside, NY
  • 762 Merrick Rd, Baldwin, NY 11510

Professional Records

License Records

Jin Taek Han

License #:
11119 - Active
Issued Date:
Jan 30, 2002
Expiration Date:
Aug 31, 2017
Type:
Architect

Lawyers & Attorneys

Jin Han Photo 1

Jin Han - Lawyer

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ISLN:
918515689
Admitted:
2004
University:
Indiana University, B.A.
Law School:
Boalt Hall School of Law, University of California at Berkeley, J.D.

Medicine Doctors

Jin Han Photo 2

Dr. Jin Yong Han, Elmhurst NY - MD (Doctor of Medicine)

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Specialties:
Psychiatry
Family Medicine
Age:
51
Address:
Behavior Health Clinic
7901 Broadway Suite H3, Elmhurst, NY 11373
(718) 334-1501 (Phone)
Languages:
English
Jin Han Photo 3

Dr. Jin C Han, New York NY - MD (Doctor of Medicine)

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Specialties:
Acupuncture
Address:
406 E 63Rd St Suite 1A, New York, NY 10065
(212) 888-6181 (Phone), (212) 888-6181 (Fax)
Languages:
English
Jin Han Photo 4

Jin Y. Han

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Specialties:
Psychiatry
Work:
Harris Center For Mental Health & Intellectual Developmetal Disability
1502 Taub Loop, Houston, TX 77030
(713) 970-4600 (phone), (713) 970-4744 (fax)
Education:
Medical School
Univ Nac De Asuncion, Fac De Cien Med, Asuncion, Paraguay
Graduated: 2001
Procedures:
Psychiatric Diagnosis or Evaluation
Psychiatric Therapeutic Procedures
Conditions:
Anxiety Phobic Disorders
Bipolar Disorder
Depressive Disorders
Obsessive-Compulsive Disorder (OCD)
Post Traumatic Stress Disorder (PTSD)
Languages:
English
Description:
Dr. Han graduated from the Univ Nac De Asuncion, Fac De Cien Med, Asuncion, Paraguay in 2001. He works in Houston, TX and specializes in Psychiatry.
Jin Han Photo 5

Jin Yong Han

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Specialties:
Family Medicine
Psychiatry
Education:
Univ Nacional De Asuncion, Asuncion (2001)
Jin Han Photo 6

Jin Yong Han, Houston TX

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Specialties:
Psychiatrist
Address:
1502 Taub Loop, Houston, TX 77030
7901 Broadway, Elmhurst, NY 11373
Education:
Doctor of Medicine
Baylor Clinic & Hospital - Residency - Psychiatry
Baylor Clinic & Hospital - Residency - Family Medicine
SUNY State University Hospital of Brooklyn - Internship - Psychiatry
Board certifications:
American Board of Family Medicine Certification in Family Medicine
American Board of Psychiatry and Neurology Certification in Psychiatry (Psychiatry and Neurology)
Jin Han Photo 7

Jin Cheng Han, New York NY

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Specialties:
Acupuncturist
Address:
406 E 63Rd St, New York, NY 10065

Resumes

Resumes

Jin Han Photo 8

Lead Electrical Engineer

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Location:
440 Homestead Ct, Stewartsville, NJ 08886
Industry:
Computer Hardware
Work:
Lockheed Martin
Senior Member Engineering Staff

Exar Corporation Mar 2013 - May 2015
Senior Staff Engineer

Altior Sep 2010 - Mar 2013
Senior Engineer

Warren County Community College May 2009 - Aug 2010
Adjunct Instructor

Infineon Technologies May 2000 - Aug 2010
Member of Technical Staff and Senior Engineer
Education:
Columbia University In the City of New York 1995 - 1997
Master of Science, Masters, Electronics Engineering, Electronics
The Cooper Union For the Advancement of Science and Art 1991 - 1995
Bachelor of Engineering, Bachelors, Electronics Engineering
Skills:
Asic/Soc/Fpga Front End and Back End Design
Planning and Managing Soc/Asic Layout
Static Timing Analysis
Soc
Asic
Verilog
Fpga
Logic Synthesis
Rtl Design
Modelsim
Functional Verification
Integrated Circuit Design
C
Hardware
Electronics
Debugging
Hardware Architecture
Eda
Systemverilog
Vlsi
Usb
Application Specific Integrated Circuits
Cmos
Tcl
Ic
Field Programmable Gate Arrays
System on A Chip
Languages:
Korean
Jin Han Photo 9

School Of Photography Orange Coast College

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Industry:
Photography
Work:

School of Photography Orange Coast College
Education:
School of Photography Orange Coast College
Skills:
Photoshop
Microsoft Office
Management
Social Media
Photography
Customer Service
Jin Han Photo 10

Jin Han

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Jin Han Photo 11

Jin Han

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Jin Han Photo 12

Jin Han

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Jin Han Photo 13

Jin Han

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Jin Han Photo 14

Jin Han

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Location:
United States
Jin Han Photo 15

Jin Han

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Jin Han
Owner
Peter Cleaners
Drycleaning Plant
762 Merrick Rd, North Baldwin, NY 11510
Jin Han
Owner
Embassy Shoe Service
Ret Shoes Shoe Repair/Shoeshine Parlor Repair Services
188 N Main St, Rye Brook, NY 10573
178 N Main St, Port Chester, NY 10573
(914) 937-7509
Jin Han
President
Sun French Cleaners Inc
Drycleaning Plant · Dry Cleaning
2200 Grand Concourse, Bronx, NY 10457
(718) 562-2590
Jin Han
Founder
Han, Jin
Offices of Lawyers
100 Park Ave, New York, NY 10017
(212) 836-4704
Jin Han
Medical Doctor, Owner
Dr Han Acupuncture
Health Practitioner's Office
406 E 63 St, New York, NY 10065
(212) 888-6181
Jin K. Han
Pastor
The Korean Church of Queens Inc
Religious Organization
8900 23 Ave, Flushing, NY 11369
(718) 532-4100
Jin Fan Han
JIN FA HAN INC
135-50 Roosevelt Ave 1811, Flushing, NY 11354
Jin Suk Han
HANA MECH INC
33-10 Ferrington St, Flushing, NY 11354

Publications

Us Patents

Analog Circuit For Softmax Function

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US Patent:
20200167402, May 28, 2020
Filed:
Nov 23, 2018
Appl. No.:
16/198945
Inventors:
- Armonk NY, US
Paul SOLOMON - Westchester NY, US
Xiaodong CUI - Chappaqua NY, US
Jin Ping HAN - Yorktown Heights NY, US
Xin ZHANG - Yorktown Heights NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 17/10
G06F 9/30
G06F 9/38
G06K 9/62
G06N 3/08
Abstract:
Embodiments for implementing a softmax function in an analog circuit. The analog circuit may comprise a plurality of input nodes to accept voltage inputs; a plurality of diodes connected to each of the plurality of input nodes to perform a current adding function; a log amplifier coupled to the plurality of diodes; a plurality of analog adders coupled to the voltage inputs and an output of the log amplifier; and a plurality of exponential amplifiers, each of the plurality of exponential amplifiers coupled to one of the plurality of analog adders.

Multi-Terminal Cross-Point Synaptic Device Using Nanocrystal Dot Structures

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US Patent:
20200005129, Jan 2, 2020
Filed:
Jun 28, 2018
Appl. No.:
16/021824
Inventors:
- Armonk NY, US
Martin M. Frank - Dobbs Ferry NY, US
JIN PING HAN - Yorktown Heights NY, US
International Classification:
G06N 3/063
G06N 3/08
Abstract:
Described herein is a crossbar array that includes a cross-point synaptic device at each of a plurality of crosspoints. The cross-point synaptic device includes a weight storage element comprising a set of nanocrystal dots. Further, the cross-point synaptic device includes at least three terminals for interacting with the weight storage element, wherein a weight is stored in the weight storage element by sending a first electric pulse via a gate terminal from the at least three terminals, the first electric pulse causes the nanocrystal dots to store a corresponding charge, and the weight is erased from the weight storage element by sending a second electric pulse via the gate terminal, the second electric pulse having an opposite polarity of the first electric pulse.

Artificial Synapse With Hafnium Oxide-Based Ferroelectric Layer In Cmos Back-End

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US Patent:
20190326387, Oct 24, 2019
Filed:
Jul 3, 2019
Appl. No.:
16/502783
Inventors:
- Armonk NY, US
Takashi Ando - Tuckahoe NY, US
Xiao Sun - Pleasantville NY, US
Jin Ping Han - Yorktown Heights NY, US
Vijay Narayanan - New York NY, US
International Classification:
H01L 49/02
H01B 3/10
H01L 27/11507
H01L 21/02
H01L 21/3213
H01L 21/283
Abstract:
Artificial synaptic devices with an HfO-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400 C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.

Artificial Synapse With Hafnium Oxide-Based Ferroelectric Layer In Cmos Front-End

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US Patent:
20190252499, Aug 15, 2019
Filed:
Apr 25, 2019
Appl. No.:
16/395024
Inventors:
- Armonk NY, US
Takashi Ando - Tuckahoe NY, US
Xiao Sun - Pleasantville NY, US
Jin Ping Han - Yorktown Heights NY, US
Vijay Narayanan - New York NY, US
International Classification:
H01L 29/12
H01L 23/52
H01L 29/06
H01L 27/085
Abstract:
Artificial synaptic devices with a HfO-based ferroelectric layer that can be implemented in the CMOS front-end are provided. In one aspect, a method of forming a FET device is provided. The method includes: forming a shallow STI region in a substrate separating a first active area of the substrate from a second active area of the substrate; forming at least one FeFET on the substrate in the first active area having a ferroelectric material including a HfO-based material; and forming at least one logic FET alongside the at least one FeFET on the substrate in the second active area, wherein the at least one logic FET has a gate dielectric including the HfO-based material. A FET device formed by the present techniques is also provided.

Artificial Synapse With Hafnium Oxide-Based Ferroelectric Layer In Cmos Front-End

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US Patent:
20190252500, Aug 15, 2019
Filed:
Apr 25, 2019
Appl. No.:
16/395084
Inventors:
- Armonk NY, US
Takashi Ando - Tuckahoe NY, US
Xiao Sun - Pleasantville NY, US
Jin Ping Han - Yorktown Heights NY, US
Vijay Narayanan - New York NY, US
International Classification:
H01L 29/12
H01L 23/52
H01L 29/06
H01L 27/085
Abstract:
Artificial synaptic devices with a HfO-based ferroelectric layer that can be implemented in the CMOS front-end are provided. In one aspect, a method of forming a FET device is provided. The method includes: forming a shallow STI region in a substrate separating a first active area of the substrate from a second active area of the substrate; forming at least one FeFET on the substrate in the first active area having a ferroelectric material including a HfO-based material; and forming at least one logic FET alongside the at least one FeFET on the substrate in the second active area, wherein the at least one logic FET has a gate dielectric including the HfO-based material. A FET device formed by the present techniques is also provided.

Artificial Synapse With Hafnium Oxide-Based Ferroelectric Layer In Cmos Back-End

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US Patent:
20190131383, May 2, 2019
Filed:
Oct 30, 2017
Appl. No.:
15/797848
Inventors:
- Armonk NY, US
Takashi Ando - Tuckahoe NY, US
Xiao Sun - Pleasantville NY, US
Jin Ping Han - Yorktown Heights NY, US
Vijay Narayanan - New York NY, US
International Classification:
H01L 49/02
H01L 27/11507
H01B 3/10
H01L 21/02
H01L 21/283
H01L 21/3213
Abstract:
Artificial synaptic devices with an HfO-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400 C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.

Artificial Synapse With Hafnium Oxide-Based Ferroelectric Layer In Cmos Front-End

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US Patent:
20190131407, May 2, 2019
Filed:
Oct 30, 2017
Appl. No.:
15/797774
Inventors:
- Armonk NY, US
Takashi Ando - Tuckahoe NY, US
Xiao Sun - Pleasantville NY, US
Jin Ping Han - Yorktown Heights NY, US
Vijay Narayanan - New York NY, US
International Classification:
H01L 29/12
H01L 23/52
H01L 27/085
H01L 29/06
Abstract:
Artificial synaptic devices with a HfO-based ferroelectric layer that can be implemented in the CMOS front-end are provided. In one aspect, a method of forming a FET device is provided. The method includes: forming a shallow STI region in a substrate separating a first active area of the substrate from a second active area of the substrate; forming at least one FeFET on the substrate in the first active area having a ferroelectric material including a HfO-based material; and forming at least one logic FET alongside the at least one FeFET on the substrate in the second active area, wherein the at least one logic FET has a gate dielectric including the HfO-based material. A FET device formed by the present techniques is also provided.
Jin Wook Han from Bayside, NY Get Report