Hung Tri Le

6370649, Apr 9, 2002

Mar 2, 1998

09/033192

Michael F. Angelo - Houston TX
David F. Heinrich - Tomball TX
Hung Q. Le - Katy TX
Richard O. Waldorf - Cypress TX

Compaq Computer Corporation - Houston TX

H04K 100

713202, 713100, 713200, 713182, 713183, 713184, 380249, 380 44, 235382, 2353825

A computer system according to the present invention implements a self-modifying âfail-safeâ password system that allows a manufacturer or site administrator to securely supply a single-use password to users who lose a power-up password. The fail-safe password system utilizes at least one fail-safe counter, an encryption/decryption algorithm, a public key, and a secure non-volatile memory space. The fail-safe password is derived by generating a hash code using SHA, MD5,or a similar algorithm and encrypting the result. The fail-safe password is then communicated to the user. After the user enters the fail-safe password, the computer system generates an internal hash value and compares it with the hash code of the decrypted fail-safe password. When the decrypted fail-safe password matches the internal hash value, the user is allowed access to the computer system.

6460139, Oct 1, 2002

Nov 20, 1998

09/196549

David F. Heinrich - Tomball TX
Hung Q. Le - Katy TX

Compaq Information Technologies Group, L.P. - Houston TX

H04L 900

713200

A computer system, bus interface unit, and method is provided for programmably modifying securable resources of the computer. Those resources may be devices which can be coupled to peripheral buses of the computer, or which may contain or allow access to sensitive information that must be secured against improper access. The security system thereby functions to block accesses to certain devices based on the status of the user seeking access. Passwords stored in the security system are matched against locally and distally entered passwords from either the user of that particular computer system, an administrator of a subset of localized computer systems, or a system administrator in charge of all networked computer systems. The present security system is thereby hierarchical in nature and can be programmed by the system administrator such that the assignment of unlocked signals arising from password comparisons can be programmably mapped to various securable devices. In this fashion, a user can gain access to certain resources at one time and then later, based on the system administrator re-programming a slot assignment register, the user may no longer be given access to that device.

6510522, Jan 21, 2003

Nov 20, 1998

09/196849

David F. Heinrich - Tomball TX
Hung Q. Le - Katy TX
Paul B. Rawlins - Spring TX
Charles J. Stancil - Tomball TX

Compaq Information Technologies Group, L.P. - Houston TX

H04L 900

713200, 710126, 710100, 710132

A computer system, bus interface unit, and method are provided for securing certain devices connected to an I C bus. Those devices include any device which contains sensitive information or passwords. For example, a device controlled by a I C-connected device bay controller may contain sensitive files, data, and information to which improper access may be denied by securing the device bay controller. Moreover, improper accesses to passwords contained in non-volatile memory connected to the I C bus must also be prevented. A bus interface unit coupled within the computer contains registers, and logic which compares the incoming I C target and word addresses with coded bits within fields of those registers. If the target or word address is to a protected address or range of addresses, then an unlock signal must be issued before the security control logic will allow the target or word address to access the I C bus or addressed device thereon. The unlock signal can be assigned to a particular slot among numerous slots, wherein the slots are arranged in hierarchical order.

6678813, Jan 13, 2004

Oct 28, 1999

09/428874

Hung Q. Le - Katy TX

Hewlett-Packard Development Company, L.P. - Houston TX

G06F 1206

711172, 711173, 711147, 710 56

A system supports allocating buffer storage for multiple buffers from a common storage area and dynamically reconfiguring the common storage area to shift buffer storage between buffers. A buffer mechanism controls access to buffer storage allocated within the common storage area. An allocation mechanism changes buffer storage allocation by moving one or more boundary pointers after verification that the reconfiguration is valid. The system provides more efficient use of memory and can allow a smaller memory requirement than conventional systems with fixed buffer storage sizes.

6938143, Aug 30, 2005

Aug 15, 2003

10/641755

Hung Q. Le - Katy TX, US

Hewlett-Packard Development Company, L.P. - Houston TX

G06F012/00

711172, 711173, 711147, 710 56

A system supports allocating buffer storage for multiple buffers from a common storage area and dynamically reconfiguring the common storage area to shift buffer storage between buffers. A buffer mechanism controls access to buffer storage allocated within the common storage area. An allocation mechanism changes buffer storage allocation by moving one or more boundary pointers after verification that the reconfiguration is valid. The system provides more efficient use of memory and can allow a smaller memory requirement than conventional systems with fixed buffer storage sizes.

20120124448, May 17, 2012

Sep 10, 2009

13/384678

Ted Emerson - Tomball TX, US
David F. Heinrich - Tomball TX, US
Hung Q. Le - Katy TX, US

G06F 11/08
H03M 13/09

714758, 714E1103

A system comprising a memory subsystem having at least one memory device, and a memory controller to control access of the memory subsystem, wherein the memory controller is configured to store data with error correction code (ECC) information in a first portion of the memory subsystem, and to store data without ECC information in a second portion of the memory subsystem.

20130046933, Feb 21, 2013

Jun 22, 2010

13/641567

Hung Q. Le - Katy TX, US
Theodore F. Emerson - Tomball TX, US
David F. Heinrich - Tomball TX, US
Robert L. Noonan - Crystal Lake IL, US

G06F 12/00
G06F 12/08

711118, 711149, 711E12017

A memory controller containing one or more ports coupled to a buffer selection logic and a plurality of buffers. Each buffer is configured to store write data associated with a write request and each buffer is also coupled to the buffer selection logic. The buffer selection logic is configured to store write data associated with a write request from at least one of the ports in any of the buffers based on a priority of the buffers for each one of the ports.

20130067189, Mar 14, 2013

May 28, 2010

13/697972

David F. Heinrich - Tomball TX, US
Theodore F. Emerson - Tomball TX, US
Hung Q. Le - Katy TX, US

G06F 12/06

711170, 711E12084

A method for initializing a memory subsystem () of a management controller () includes, with an additional memory initialization module () of the management controller (), initializing the memory subsystem () of the management controller () in response to the memory subsystem () not being properly initialized. A management controller () includes a memory subsystem () including a memory controller () and a memory (); firmware () able to initialize the memory subsystem (); and a memory initialization module () to initialize the memory subsystem () if the memory subsystem () is not properly initialized.