Hiep V Le

7558192, Jul 7, 2009

May 3, 2004

10/838662

Alex Van Truong - San Jose CA, US
David Lai - Mountain View CA, US
Tien D. Tran - Fountain Valley CA, US
Hiep Le - Atherton CA, US
Eugene Wang - Fremont CA, US

Cisco Technology, Inc. - San Jose CA

G01R 31/08
G06F 11/00

370216, 370242, 714 2, 714 25

One embodiment of the invention includes a system for overriding an operation of an electronic device. The system includes an override hardware logic that is communicatively coupled with a monitoring system. The monitoring system can output an electronic command signal in response to a detected point of failure associated with the system. In response to receiving the electronic command signal, the override hardware logic can override the operation performed by the electronic device in order to compensate for the detected point of failure.

42766176, Jun 30, 1981

Jun 28, 1979

6/053125

Hiep T. Le - Sunnyvale CA

Raytheon Company - Lexington MA

G11C 700

365189

A transistor logic circuit wherein a selector is coupled to a pullup resistor and output sense amplifier through an isolation transistor. The selector includes a plurality of transistors having emitter electrodes coupled to a plurality of input terminals, base electrodes coupled to control signals and collector electrodes connected to a common output terminal. The isolation transistor has its base electrode coupled to a reference voltage and its emitter and collector electrodes serially coupled between the output terminal and the pullup resistor and output sense amplifier. Control signals fed to the base electrodes of the plurality of transistors couples a selected one of the input terminals to the output terminal. The logic state of a signal at such selected input terminal is sensed by the sense amplifier. The isolation transistor isolates the large capacitance produced as a result of connecting the collector electrodes together from the switching action of the sense amplifier.