Inventors:
Edward T. Spears - Gilbert AZ, US
Douglas A. Teeter - Arlington MA, US
Hien D. Bui - Lowell MA, US
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H03F 1/14
Abstract:
The present invention is a parallel RF amplifier circuit that selects between a high power side (HPS) and a low power side (LPS), depending upon output power. A chain matching network couples an LPS output to an HPS output for improved efficiency at lower output power. When the HPS is selected, the LPS output is disabled, and when the LPS is selected, the HPS output is disabled When the HPS is selected, large signal voltage swings from the collector of the HPS amplifier may be multiplied through the chain matching network, and may cause negative voltage swings at the LPS collector, which may degrade linearity and efficiency of the HPS amplifier by driving currents into the disabled LPS amplifier. Therefore, the present invention includes LPS bias circuitry to minimize impacts of negative voltage swings at the LPS output.