Henry Y Chu

6480177, Nov 12, 2002

Jun 2, 1998

09/088673

Donald B. Doherty - Richardson TX
Henry Chu - Plano TX
James D. Huffman - Richardson TX

Texas Instruments Incorporated - Dallas TX

G09G 334

345 84, 345 55, 345 85, 345100, 345108, 345204, 348750, 348770

A method of addressing an array of spatial light modulator elements. The method divides the array into blocks of elements, provides reset lines (MRST) to each of the block of elements, separate from the other blocks of elements, as well as address voltage supplies (VCC ) to each of the block of elements, separate from the other blocks of elements, addresses data to each of the blocks independent of the other blocks, resets each of the blocks, and steps address voltage to each of the block, where only blocks that are being reset receive the stepped address voltage. A spatial light modulator array ( ) is also provided that has a layout to facilitate the method, including internal or external circuitry ( ) to provide control of the stepped addressing voltages.

6985278, Jan 10, 2006

Dec 31, 2003

10/749497

Henry Chung-Hsin Chu - Plano TX, US
Armando Gonzalez - Allen TX, US
Thomas D. Oudal - Lewisville TX, US

Texas Instruments Incorporated - Dallas TX

G02B 26/00
G02B 26/08
G02B 7/182
G09G 3/34

359291, 359295, 359298, 359846, 345 85

Device and method for a damping function to reduce undesirable mechanical transient responses to control signals. In one aspect of the present invention, the damping function may be used to reduce overshoot and oscillation when a digital micromirror is driven from a landing plate to the flat or neutral position. In another aspect of the present invention, the damping function may be used to reduce transient resonance of a digital micromirror when the micromirror is driven to a landing plate.

7139113, Nov 21, 2006

Jul 29, 2005

11/192785

Henry C. Chu - Plano TX, US
Cuiling Gong - Plano TX, US

Texas Instruments Incorporated - Dallas TX

G02B 26/00

359291, 359290

According to one embodiment of the present invention a micro-mirror element comprises a first address portion, a second address portion, and one or more address vias. The first address portion comprises a plurality of address pads distributed in a first layer of the micro-mirror element. The micro-mirror element has a first side and a second side and at least two of the plurality of address pads are distributed on the first side. The second address portion comprises a plurality of address electrodes distributed in a second layer of the micro-mirror element. The one or more address vias are operable to conductively couple the first address portion to the second address portion for the transfer of an address voltage from the first address portion to the second address portion. The distribution of the address pads of the first address portion and the address electrodes of the second address portion causes an electrostatic force provided by the second address portion to be greater than an electrostatic force provided by the first address portion.

54445663, Aug 22, 1995

Mar 7, 1994

8/206812

Richard O. Gale - Richardson TX
Randall S. Lawson - Plano TX
Harlan P. Cleveland - Garland TX
Henry Chu - Plano TX
Carl W. Davis - Plano TX
Scott D. Heimbuch - Dallas TX
Claude E. Tew - Dallas TX

Texas Instruments Incorporated - Dallas TX

G02B 2608

359291

A method for controlling a digital micromirror device 40 resulting in decreased mechanical stress, longer device lifetimes, decreased incidence of spontaneous bit reset, and increased pulse-width modulation accuracy. To reduce the device stress, the bias voltage 142 applied to the mirror 50 may be reduced after the mirror 50 has been latched. To prevent premature mirror changes, the address electrode bias voltage 140 may be reduced after the mirror is driven to the desired position. To ensure that the mirror 50 returns to the neutral position during reset, the mirror bias voltage 142 may be raised from ground potential to approximately halfway between the two addressing voltages during the reset period 152. To reduce the effects of hinge memory and to ensure that the mirror 50 rotates toward the proper address electrode, the mirror bias voltage 142 may be gradually increased to allow the mirror 50 time to rotate towards the proper address electrode.

57061238, Jan 6, 1998

Sep 27, 1996

8/720367

Rodney D. Miller - Frisco TX
Richard O. Gale - Richardson TX
Henry Chung-Hsin Chu - Plano TX
Harlan Paul Cleveland - Garland TX
Rabah Mezenner - Richardson TX

Texas Instruments Incorporated - Dallas TX

G02B 2600

359291

A method of providing control signals for resetting mirror elements (10,20) of a digital micro-mirror device (DMD) having reset groups (FIG. 4), or for resetting moveable elements of other micro-mechanical devices that operate with similar principles. A bias voltage is applied to the mirrors and their landing sites, and an address voltage is applied under the mirrors. (FIG. 3). The address voltage is held at an intermediate level except during a reset period. During this reset period, the address voltage is increased. Also, during reset, the bias applied to mirrors to be reset is pulsed and offset, and the bias applied to mirrors not to be reset is increased. (FIGS. 5 and 6).