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Hao Peng

from Sunnyvale, CA
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Related to:
Peijun Xu, 62Karen W Zheng, 47William Y Zheng, 78William ZhengJin Wang Yuan, 75
Connected to:
Andrew Peng, 67Benny Peng, 73Bing L Peng, 53Bo Peng, 57Chou M Peng, 86Chung Peng, 60De H Peng, 58Douglas T Peng, 64Eliot S Peng, 37Gordon J Peng, 32

Hao Peng Phones & Addresses

  • 1285 Socorro Ave, Sunnyvale, CA 94089 (408) 368-4971
  • San Jose, CA
  • Santa Clara, CA
  • 1285 Socorro Ave, Sunnyvale, CA 94089

Resumes

Resumes

Hao Peng Photo 1

Senior Software Engineer Technical Lead

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Location:
13623 94Th St, Kirkland, WA 98033
Industry:
Computer Software
Work:
Microsoft
Senior Software Engineer Technical Lead
Sandisk Oct 2012 - Dec 2015
Software Engineer Ii --> Senior Software Engineer
Syracuse University New House School of Topizen Project May 2011 - Jul 2011
Web Designer
China Construction Bank May 2009 - Dec 2009
Customer Manager
Hwadee Information Technology Jul 2008 - Sep 2008
Sql Designer
Education:
Syracuse University 2010 - 2011
Master of Science, Masters, Computer Science Syracuse University 2010
Southwestern University of Finance and Economics 2005 - 2009
Bachelors, Bachelor of Science, Computer Science Southwestern University of Finance and Economics 2005
Fuzhou No 1. High School 2002 - 2005
Fuzhou No.1 Middle School
Skills:
C++
C
C#
Css
Html
Linux
Sql
Php
Visual Studio
Javascript
Freebsd
Linux Kernel
Internet Security
Computer Security
Ldap
Windows Server
Windbg
Indexing
Bookmarking
Extensible Storage Engine
Languages:
Mandarin
English
Hao Peng Photo 2

Principal Systems Engineer

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Location:
1285 Socorro Ave, Sunnyvale, CA 94089
Industry:
Semiconductors
Work:
Andapt, Inc.
Principal Systems Engineer
Rohm Powervation 2016 - 2019
Senior Architect
Marvell Semiconductor 2012 - 2016
Senior Staff Application Engineer
Marvell Semiconductor 2010 - 2012
Staff Application Engineer
Semtech 2007 - 2010
Senior Application Engineer
Education:
Tsinghua University
Master of Science, Masters, Bachelors, Bachelor of Science, Engineering University of Colorado Boulder
Doctorates, Doctor of Philosophy, Electronics
Skills:
Analog
Mixed Signal
Power Management
Power Electronics
Digital Signal Processors
Device Drivers
Ic
Semiconductors
Test Engineering
Microcontrollers
Digital Circuit Design
Asic
Signal Processing
Analog Circuit Design
Circuit Design
Digital Control
Image Processing
Verilog
Embedded Systems
Fpga
Pcb Design
Integrated Circuit Design
Matlab
Simulink
Application Specific Integrated Circuits
Languages:
Mandarin
English
Hao Peng Photo 3

Software Engineer

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Location:
Sunnyvale, CA
Work:
Finisar Corporation (Nasdaq: Fnsr)
Software Engineer
Hao Peng Photo 4

Hao Peng

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Hao Peng Photo 5

Hao Peng

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Hao Peng Photo 6

Hao Peng

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Publications

Wikipedia

Hao Peng

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Hao Peng (traditional Chinese: ; simplified Chinese: ; pinyin: Ho Png; Wade-Giles: Hao P'eng) (born 1881) was a politician in the Republic of China. ...

Wikipedia References

Hao Peng Photo 7

Hao Peng

About:
Born:

1881

Work:
Position:

Manager • President • Chief executive • Supervisor • Prosecutor

Education:
Specialty:

Leader

Hao Peng Photo 8

Hao Peng

About:
Born:

1960

Work:
Position:

Chairman • Governor • Business Executive

Education:
Studied at:

Northwestern Polytechnical University

Specialty:

Director

Skills & Activities:
Preference:

Communist

Hao Peng Photo 9

Hao Peng (Footballer)

Hao Peng Photo 10

Hao Peng (Prc)

Isbn (Books And Publications)

Jin Shang: Qi Da Jia Zu De Bo Yi

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Author

Hao Peng

ISBN #

7802231299

Us Patents

Digital Current Mode Controller

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US Patent:
7902803, Mar 8, 2011
Filed:
Dec 31, 2007
Appl. No.:
11/967981
Inventors:
Hao Peng - San Jose CA, US
Dragan Maksimovic - Boulder CO, US
Assignee:
The Regents of the University of Colorado - Denver CO
International Classification:
G05F 1/00
US Classification:
323283
Abstract:
A digital current-mode controller for a DC-DC converter is disclosed. The controller comprises a digital current reference; and a current loop compensator adapted to receive a digital current error signal derived from a digital current sample sensed from the DC-DC converter and the digital current reference and to generate a duty-cycle command, wherein the current loop compensator comprises a low-pass filter that is used in generating the duty-cycle command. A DC-DC regulator comprising a digital current-mode controller and a method of controlling a DC-DC converter are also disclosed.

Method Of Digital Control Of Pwm Converters Achieving Fast Transient Response And Low Steady-State Jittering

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US Patent:
8373402, Feb 12, 2013
Filed:
Sep 1, 2009
Appl. No.:
12/552051
Inventors:
Hao Peng - Sunnyvale CA, US
Assignee:
Semtech Corporation - Camarillo CA
International Classification:
G05F 1/00
US Classification:
323283
Abstract:
A pulse width modulator (PWM) control system for a power converter achieves a fast transient response and low steady-state jittering. The control system manages the ADC sample timing to reduce noise susceptibility, and the ADC includes a regulation bin or dead band to minimize large phase corrections and thus eliminate limit cycling. The PWM module includes a dithering circuit to accumulate fractional PWM control signals to reduce period jitter by increasing the effective resolution of the pulse width modulator.

Digital Control Of Pwm Converters With Nonlinear Gain Scheduling

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US Patent:
8427126, Apr 23, 2013
Filed:
Nov 30, 2009
Appl. No.:
12/627912
Inventors:
Hao Peng - Sunnyvale CA, US
Chin Chang - Agoura Hills CA, US
Assignee:
Semtech Corporation - Camarillo CA
International Classification:
G05F 1/575
US Classification:
323283, 323284
Abstract:
A system and method for controlling a digital pulse-width modulated power converter achieves a fast large-signal transient response while maintaining a slow response near the steady-state operating point in order to assure stability and to reduce the system's susceptibility to noise. Digital output error samples are processed through a gain scheduling block that applies a non-linear gain function to produce a weak loop response when the system is near its steady-state equilibrium point and a strong loop response when large transients are encountered. The resulting system maintains a fast transient response to large error signals while reducing noise and loop jittering and assuring loop stability.

Differential Delay-Line Analog-To-Digital Converter

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US Patent:
20060273831, Dec 7, 2006
Filed:
Mar 6, 2006
Appl. No.:
11/369888
Inventors:
Dragan Maksimovic - Boulder CO, US
Hao Peng - San Jose CA, US
International Classification:
H03F 3/45
US Classification:
327103000
Abstract:
Differential delay-line analog-to-digital (A/D) converters for use in current and power sensing applications are provided. These A/D converters are well suited for a wide range of electronic applications, including over-load protection, current mode control, current sharing in digitally controlled switched-mode power supplies, power sensing, and implementation of power optimization methods in power management applications.

Triac Dimmer Detection

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US Patent:
20120212258, Aug 23, 2012
Filed:
Feb 16, 2012
Appl. No.:
13/398150
Inventors:
Jinho Choi - Saratoga CA, US
Hao Peng - Sunnyvale CA, US
Wanfeng Zhang - Palo Alto CA, US
Tuyen Doan - San Jose CA, US
International Classification:
H03K 5/153
US Classification:
327 75
Abstract:
Methods, circuits, and systems for determining the presence of a chopped input signal are disclosed. A digital signal generator can produce multiple digital signals when an alternating current (AC) signal input reaches multiple threshold voltages. The times at which the threshold voltages are reached can be determined by looking at the times at which the digital signals go high and low. The differences between the times at which the digital signals go high and low are used to determine if the AC signal input is a leading or trailing edge chopped signal. The AC input signal is a leading edge chopped signal when the difference between the times at which the digital signals go high is less than a predetermined time threshold, and is a trailing edge chopped signal when the difference between the times at which the digital signals go low is less than a predetermined time threshold.

Two-Peak Current Control For Flyback Voltage Converters

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US Patent:
20120230065, Sep 13, 2012
Filed:
Feb 24, 2012
Appl. No.:
13/404584
Inventors:
Jinho Choi - Saratoga CA, US
Hao Peng - Sunnyvale CA, US
Wanfeng Zhang - Palo Alto CA, US
Tuyen Doan - San Jose CA, US
International Classification:
H02M 3/335
US Classification:
363 2118
Abstract:
A system including a switch configured to supply power to a load. A first comparator is configured to compare a first current through the switch to a first threshold. A second comparator is configured to compare the first current through the switch to a second threshold. The second threshold is greater than the first threshold. A current control module is configured to turn off the switch (i) for a first duration in response to the first current through the switch being greater than or equal to the first threshold and (ii) for a second duration in response to the first current through the switch being greater than or equal to the second threshold. The current control module is configured to adjust the second duration based on a difference between an estimated current through the load and a desired current through the load.

Line Voltage Detection Circuit

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US Patent:
20150077090, Mar 19, 2015
Filed:
Nov 20, 2014
Appl. No.:
14/548832
Inventors:
- St. Michael, BB
Hao Peng - Sunnyvale CA, US
Wanfeng Zhang - Palo Alto CA, US
Tuyen Doan - San Jose CA, US
International Classification:
G01R 19/00
G01R 17/02
US Classification:
324 7611
Abstract:
A first filter outputs a first signal in response to receiving an input signal. The first signal has a first state in response to the input signal reaching a first threshold voltage on a leading edge of the input signal, and a second state in response to the input signal reaching the first threshold voltage on a trailing edge of the input signal. A second filter outputs a second signal in response to receiving the input signal. The second signal has the first state in response to the input signal reaching a second threshold voltage on the leading edge of the input signal, and the second state in response to the input signal reaching the second threshold voltage on the trailing edge of the input signal. A detection circuit determines, based on times when the first and second thresholds are reached, whether the input signal is received from a triac.
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Hao Peng from Sunnyvale, CA Get Report