Inventors:
Bradley C. Aldrich - Austin TX
Jose Fridman - Brookline MA
Paul Meyer - Chandler AZ
Gang Liang - Acton MA
Assignee:
Intel Corporation - Santa Clara CA
Analog Devices, Inc. - Norwood MA
International Classification:
G06F 9302
US Classification:
712221, 708518, 708524, 712 35
Abstract:
An integrated circuit which has two separate paths for two different data widths. The first processing path processes data up to n bits in a n multiplier. A second path operates in parallel with the first path, and includes smaller units which process data up to n 2 bits. The two paths can operate in parallel, but since the two paths have different data widths, they can more effectively operate with the different data sizes.