Chung Shing Lo from Honolulu, HI, age 79

Resumes

Chung Lo

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Location:

San Francisco, CA

Industry:

Higher Education

Work:

Aalborg University
Student

Human Resources

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Industry:

Consumer Goods

Work:

Danone
Human Resources

Chung Lo Saint Paul, MN

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Work:

Best Buy

Feb 2013 to 2000
Store Planner
TCF Bank
Coon Rapids, MN
Nov 2010 to Jun 2013
Banking Sales Representative
MCTC WorkForce Construction
Minneapolis, MN
Jul 2012 to Sep 2012
Student Intern

Education:

Minneapolis Community & Technical College
Minneapolis, MN
2011 to 2012
Diploma in Architectural Technology
Academy of Art University
San Francisco, CA
Interior Architecture & Design

Skills:

AutoCAD 2012, Revit 2012, Building Designs, Building Detailing, Building Codes, AIA Contracts and Documents, Color Rendering, Model Making

Publications

Us Patents

Method And Apparatus For A Crystal Oscillator To Achieve Fast Start-Up Time, Low Power And Frequency Calibration

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US Patent:

7348861, Mar 25, 2008

Filed:

Mar 31, 2005

Appl. No.:

11/095630

Inventors:

I-chang Wu - Fremont CA, US
Chung Wen Lo - Palo Alto CA, US
Keng Leong Fong - Sunnyvale CA, US

Assignee:

Ralink Technology, Inc. - Cupertino CA

International Classification:

H03B 5/32
H03L 5/00

US Classification:

331158, 331 36 C, 331183

Abstract:

One embodiment of the present invention includes a frequency generation circuit including a control module, an oscillator circuit coupled to the control module, the oscillator circuit having a start-up time defined by the time required to reach a desired frequency. The oscillator circuit includes an amplifier having an input and an output and being programmably-alterable by the control module, a first capacitor coupled to the input of the amplifier and being programmably-alterable, in capacitance, by the control module, a second capacitor coupled to the output of the amplifier, a crystal resonator coupled to the first and second capacitors for generating an output signal having a desired frequency, wherein fast start-up time is achieved.

Frequency Synthesizer With Automatic Tuning Control To Increase Tuning Range

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US Patent:

7019595, Mar 28, 2006

Filed:

Oct 7, 2003

Appl. No.:

10/681517

Inventors:

Chung When Lo - Palo Alto CA, US
Keng Leung Fung - Sunnyvale CA, US

Assignee:

Ralink Technology, Inc. - Cupertino CA

International Classification:

H03L 7/00

US Classification:

331 16, 331 11, 327148, 327157

Abstract:

A phase control loop circuit for tuning to a reference frequency signal having a phase lock loop (PLL) circuit being responsive to a reference frequency signal having a reference frequency, said PLL circuit including a voltage control oscillator (VCO) for generating a VCO output, said PLL circuit for generating a PLL output, said phase control loop circuit processing said VCO output to generate an output frequency signal having an output frequency, in accordance with an embodiment of the present invention. The phase control loop circuit further includes a coarse tuning circuit being coupled to said PLL circuit, said coarse tuning circuit being responsive to said PLL output for processing the same to generate a counter output, said VCO being responsive to said counter output, said counter output for coarse tuning said output frequency signal to said reference frequency signal, said coarse tuning circuit further responsive to a lock detection (LD) signal, said LD signal for controlling said counter output to cause said output frequency to be within a predetermined range of frequencies including said reference frequency, said PLL circuit for fine tuning said output frequency signal to said reference frequency signal, wherein said PLL circuit and said coarse tuning circuit tune the output frequency to a reference frequency included in a wide range of frequencies.

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