Chia Lan Wu

6510050, Jan 21, 2003

Nov 21, 2000

09/718866

Whay S. Lee - Newark CA
Nisha Talagala - Fremont CA
Chia Y. Wu - Newark CA
Fay Chong, Jr. - Cupertino CA
Randall D. Rettberg - Danville CA

Sun Microsystems, Inc. - Santa Clara CA

H05K 114

361685, 361683, 361727, 361735, 439 59, 439 61, 4399281, 3122231, 3122232, 312350

A substrate for packaging a storage or server system may include one or more sections of the substrate configured to hold a two-dimensional array of disk drives. Another section of this substrate may be configured to hold circuitry for accessing the array of disk drives. This circuitry may include one or more processors. The substrate also includes a first plurality of ribs positioned in the first access of the substrate. The first plurality of ribs separate the sections from one another. The section configured to hold the control circuitry may also be configured to hold one or more power supplies for supplying power to the array of disk drives and control circuitry. This section, as well as other sections, may be divided in two by one or more additional ribs in a transverse direction. The substrate may be configured to be mounted in a cage or rack and may include an edge connector at one edge of the substrate to provide electrical connectivity to a back plane in the cage or rack. A lateral protrusion may extend along each parallel edge of the substrate for mounting the substrate in the cage or rack by sliding the substrate into the cage or rack.

6651131, Nov 18, 2003

Sep 6, 2000

09/656354

Fay Chong, Jr. - Cupertino CA
Whay Sing Lee - Newark CA
Nisha Talagala - Fremont CA
Chia Yu Wu - Newark CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1300

710317, 710303, 709220, 709239

A network and storage I/O device is described for use with a host computer system having a system bus coupled to a host processor and a main memory to provide a high bandwidth network server system. The network and storage I/O device includes a plurality of network controllers to communicate with client computers connected over a network, a plurality of storage controllers to transfer data to and from storage devices, at least one memory element to temporarily store data transferred between the network controllers and the storage controllers and a crossbar switch having a plurality of nodes to interconnect the plurality of network controllers, the plurality of storage controllers and the at least one memory element. The network and storage I/O device also includes a bridge coupled between one of the nodes and the system bus of the host computer.

6718428, Apr 6, 2004

Dec 18, 2000

09/740132

Whay S. Lee - Newark CA
Randall D. Rettberg - Danville CA
Nisha D. Talagala - Fremont CA
Chia Y. Wu - Newark CA
Fay Chong, Jr. - Cupertino CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1200

711101, 711154, 711170, 709213, 709217

A storage array interconnection fabric may be configured using a torus topology. A storage system including a path-redundant torus interconnection fabric is coupled to a plurality of nodes. The torus interconnection fabric may be configured to connect the plurality of nodes in an array including N rows and M columns, where N and M are positive integers. The array may be configured such that a first node in a first row of the N rows is connected to a second node in the first row and a first node in a first column of the M columns is connected to a second node in the first column. Also an ending node in the first row is connected to the first node in the first row and an ending node in the first column is connected to the first node in the first column. In addition, a first portion of the plurality of nodes is configured to communicate with a plurality of storage devices such as disk drives.

6742081, May 25, 2004

Apr 30, 2001

09/846667

Nisha D. Talagala - Fremont CA
Whay S. Lee - Newark CA
Chia Y. Wu - Newark CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1200

711114, 711113, 711202, 711203, 714 6, 714 7

A storage system may include a plurality of storage devices each having a plurality of addressable locations for storing data. A storage controller may be coupled to the storage devices and configured to store and retrieve data from the storage devices. An indirection map may be stored within the system having a plurality of map entries each configured to map a virtual address to a physical address on the storage devices. Each map entry may also store a checksum for data stored at the physical address indicated by the map entry. The storage controller may receive storage requests specifying a virtual address and may access the indirection map for each storage request to obtain the corresponding physical address and checksum. Dynamic striping may be employed so that new writes form new parity groups. Thus, stripes of various sizes may be supported by the storage system.

6789162, Sep 7, 2004

Oct 17, 2000

09/690599

Nisha D. Talagala - Fremont CA
Chia Y. Wu - Newark CA
Whay S. Lee - Newark CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1200

711112, 711 4, 711111, 711114, 711165, 711167, 711170, 710 1, 710205, 710206, 707 1

A storage device controller configured for coupling to a storage device (e. g. , a hard disk drive) having a multiple locations for storing data. The controller is coupled to receive a WRITE ANYWHERE command including write data. Unlike a conventional write command, the WRITE ANYWHERE command does not specify a location of the storage device where the write data is to be stored. The controller responds to the WRITE ANYWHERE command by: (i) selecting one or more unused locations of the storage device, and (ii) writing the write data to the storage device, wherein the writing of the write data includes directing the storage device to store the write data in the one or more unused locations of the storage device. At least a portion of the write data in stored in each of the one or more unused locations. The controller may be coupled to receive the WRITE ANYWHERE command from a host configured to track usage of the locations of the storage device.

6795850, Sep 21, 2004

Dec 13, 2002

10/319089

Chia Y. Wu - Newark CA
John D. Acton - Danville CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1200

709213, 711141

Each nodes memory controller may be configured to send and receive messages on a dedicated memory-to-memory interconnect according to the communication protocol and to responsively perform memory accesses in a local memory. The type of message sent on the interconnect may depend on which memory region is targeted by a memory access request local to the sending node. If certain regions are targeted locally, a memory controller may delay performance of a local memory access until the memory access has been performed remotely. Remote nodes may confirm performance of the remote memory accesses via the memory-to-memory interconnect.

6813688, Nov 2, 2004

Dec 4, 2000

09/729762

Chia Y. Wu - Newark CA
Whay S. Lee - Newark CA
Nisha D. Talagala - Fremont CA

Sun Microsystems, Inc. - Santa Clara CA

G06F 1116

711114, 714 6

A system may include mirroring logic, a controller, and first and second devices (e. g. , data storage devices). The first and second devices may include multiple registers. The mirroring logic may be configured in a first mode wherein the mirroring logic allows the registers of the first device to be accessed from the controller and prevents the registers of the second device from being accessed from the controller. The mirroring logic may be configured in a second mode wherein the mirroring logic allows the registers of the second device to be accessed from the controller and prevents the registers of the first device from being accessed. The first and second devices may be configured via the mirroring logic such that the first and second devices are selected simultaneously. When selected simultaneously, the first and second devices may carry out a subsequently issued command substantially simultaneously.

6898687, May 24, 2005

Dec 13, 2002

10/319081

Chia Y. Wu - Newark CA, US
John D. Acton - Danville CA, US

Sun Microsystems, Inc. - Santa Clara CA

G06F012/00

711173, 711141, 711118, 711154, 709213

Resources may be shared between multiple controllers configured to access those resources by associating a portion of a semaphore shared memory region with each different shared resource. Whenever a local write request to the portion of the semaphore shared memory region is detected by a memory controller, the memory controller may broadcast the write request to other remote memory controllers. The memory controller may delay performing a memory access to a local copy of that portion of the semaphore shared memory region until the other memory controllers have performed the write access to their copy of the semaphore shared memory region. The values stored in the semaphore shared memory region indicate which controller currently has access to the shared resource.