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Chanh V Le

from Beaverton, OR
Age ~77
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Also known as:
Chanh Vanle, Chan H Le, Chanh Vle, Chanh Vanlee, Chanh Nguyen
Phone and address:
81 SW 147Th Pl, Beaverton, OR 97006
Related to:
Hiep Nguyen
Connected to:
Ai Le, 52Alphonse A Le, 51Amie Le, 46Angela M Le, 48Angeline H Le, 45Anhvu X Le, 56Annette M Le, 88Anson H Le, 39Antoine Le, 43Ar Le, 37

Chanh Le Phones & Addresses

  • 81 SW 147Th Pl, Beaverton, OR 97006
  • Hillsboro, OR

Work

Company: - Portland, OR Position: Assembly

Education

School / High School: ITT Tech- Portland, OR 2001 Specialities: AA in Electronic and Engineer technology

Skills

I have good for electrical • drywall • plumbing • painting • flooring • electric theory.

Resumes

Resumes

Chanh Le Photo 1

Principal Consultant

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Location:
17133 southwest Soren Ct, Beaverton, OR 97007
Industry:
Semiconductors
Work:
Microsoft
Principal Consultant
Intel Corporation Jan 1988 - Jul 2015
Senior Staff Hw Design Engineer
Education:
Portland State University 1986 - 1989
Bachelors, Bachelor of Science Portland Community College 1984 - 1986
Associates
Skills:
Electrical Engineering
Semiconductors
Processors
Intel
Verilog
Asic
Embedded Systems
Signal Integrity
Device Drivers
Pcb Layout Design
Motherboard Design
Test Automation
Pcb Design
Debugging
Hardware Architecture
Testing
Electronics
Soc
Interests:
Children
Economic Empowerment
Civil Rights and Social Action
Politics
Science and Technology
Disaster and Humanitarian Relief
Human Rights
Languages:
Vietnamese
English
Certifications:
Allegro Cad Layout
Cadence Design Systems
Chanh Le Photo 2

Chanh Le

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Chanh Le Photo 3

Chanh Le

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Chanh Le Photo 4

Chanh Le

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Chanh Le Photo 5

Chanh Le

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Chanh Le Photo 6

Chanh Le

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Chanh Le Photo 7

Chanh Le

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Chanh Le Photo 8

Chanh Le Portland, OR

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Work:
AssemblyPortland, OR
Education:
ITT Tech
Portland, OR
2001 to 2003
AA in Electronic and Engineer technology
Skills:
I have good for electrical, drywall, plumbing, painting, flooring, electric theory.

Publications

Us Patents

Usb-Controllable Power Supply

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US Patent:
6904373, Jun 7, 2005
Filed:
Sep 30, 2002
Appl. No.:
10/261118
Inventors:
Chanh Le - Beaverton OR, US
Say Cheong Gan - Melaka, MY
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F019/00
US Classification:
702 60, 702 57, 702117, 702122, 702189, 700286, 700297, 340333, 3404251, 710313
Abstract:
A USB (universal serial bus) controllable power supply and method for supplying power to a circuit board device under test (DUT) via a controllable power supply. The power supply employs a USB interface to communicate with external devices, such as a host computer. In response to power supply control commands from the host computer, the controllable power supply provides various power outputs at various external connectors, including main power, ATX12V power, and peripheral power to be used for peripheral devices corresponding to a DUT test apparatus. The controllable power supply also provides a built-in short circuit check function, and monitors the voltage levels of its power outputs to ensure they are within predefined limits. The power supply also supports emergency shutdown operations, and provides an EOS (emergency overstress) function. In one embodiment, the power supply includes an integrated USB hub.

Universal Automated Circuit Board Tester

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US Patent:
7110905, Sep 19, 2006
Filed:
Apr 9, 2004
Appl. No.:
10/821570
Inventors:
Chanh Le - Beaverton OR, US
Say Cheong Gan - Melaka, MY
Thomas A. Repko - Dallas OR, US
Frank W. Joyce - Portland OR, US
Teik Sean Toh - Sungai Petani, MY
Douglas P. Kreager - Lake Oswego OR, US
Yoong Li Liew - Kulim, MY
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 3/00
US Classification:
702118, 702117, 702120, 702121
Abstract:
An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.

Universal Automated Circuit Board Tester

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US Patent:
7154257, Dec 26, 2006
Filed:
Sep 30, 2002
Appl. No.:
10/261055
Inventors:
Chanh Le - Beaverton OR, US
Say Cheong Gan - Melaka, MY
Thomas A. Repko - Dallas OR, US
Frank W. Joyce - Portland OR, US
Teik Sean Toh - Sungai Petani, MY
Douglas P. Kreager - Lake Oswego OR, US
Yoong Li Liew - Kulim, MY
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01R 31/28
US Classification:
3241581
Abstract:
An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.

Stack Universal Serial Bus Connector

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US Patent:
6609928, Aug 26, 2003
Filed:
Jun 15, 2000
Appl. No.:
09/596032
Inventors:
Chanh Le - Tigard OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01R 13648
US Classification:
4395415, 439607, 439939
Abstract:
A stacked dual socket system that is interchangeable with and has no larger footprint than a single USB compliant socket and which allows connector access to both USB channels. The stacked socket includes a first USB compliant socket and a second USB compliant socket. The second USB compliant socket is stacked on top of the first socket relative to the mother board so that the stacked has the same footprint on the mother board as a single USB compliant socket. Each socket has a linear array of four conductor pins that project downwardly from the bottom of the first socket within the footprint of the socket and makes contact with two separate arrays of electrical conductors in the mother board. The bottom of the first socket has four spaced apart legs that form the mechanical interface between the stacked socket and the mother board and which provide improved mechanical stability. An electrically conductive cowling encases all sides of both sockets except for the bottom and the front.

Alert Sensing Stove Assembly

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US Patent:
20190212012, Jul 11, 2019
Filed:
Jan 9, 2018
Appl. No.:
15/865323
Inventors:
Chanh Le - Aloha OR, US
International Classification:
F24C 3/12
G08B 21/16
G08B 17/06
G08B 25/10
F23N 5/24
Abstract:
An alert sensing stove assembly includes a stove that includes a plurality of burners. A plurality of valves is provided and each of the valves is in fluid communication with an associated one of the burners. A processor is coupled to the stove and the processor is electrically coupled to each of the valves. A sensor array is coupled to the stove to detect a variety of alert agents. The processor sends a shut down signal to each of the valves when the sensor array detects one of the alert agents. Thus, the sensor array enhances safety with respect to unattended operation of the stove. A communication unit is provided and the communication unit is coupled to the stove. The communication unit transmits an alert signal to an extrinsic communication network when the processor sends the shut off signal to alert a user to a potentially dangerous situation.
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Chanh V Le from Beaverton, OR, age ~77 Get Report