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Long B Huynh

from San Jose, CA
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Also known as:
Buu Huynh Long
Related to:
Teo V Huynh, 83Binh V Pham, 53Lien B Huynh, 66Song Huynh, 49Dung Ngoc Tran, 63Tuyen B Huynh, 38Tuy V Huynh, 61Dung N Huynh, 62Le M Tran, 47Tram B Huynh, 33
Connected to:
A Huynh, 61Allen Huynh, 78Alyssa B Huynh, 35Angelica Q Huynh, 30Anhtu T Huynh, 48Anna P Huynh, 54Au T Huynh, 72Audrey T Huynh, 39Baoanh T Huynh, 37Bich Huynh, 33

Long Huynh Phones & Addresses

  • San Jose, CA

Professional Records

License Records

Long Q Huynh

License #:
E106671 - Active
Category:
Emergency medical services
Issued Date:
Nov 6, 2014
Expiration Date:
Jun 30, 2018
Type:
Inland Counties EMS Agency

Medicine Doctors

Long Huynh Photo 1

Long P. Huynh

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Specialties:
Obstetrics & Gynecology
Work:
Avista Women's CareAvista Womens Care
90 Health Park Dr STE 290, Louisville, CO 80027
(303) 439-8910 (phone), (303) 439-9134 (fax)

Avista Women's CareAvista Womens Care
1225 Cimarron Dr UNIT 101, Lafayette, CO 80026
(303) 439-8910 (phone), (303) 439-9134 (fax)
Education:
Medical School
Virginia Commonwealth University SOM
Graduated: 2004
Procedures:
Vaginal Repair
Amniocentesis
Cesarean Section (C-Section)
Colposcopy
Cystoscopy
D & C Dilation and Curettage
Delivery After Previous Caesarean Section
Destruction of Benign/Premalignant Skin Lesions
Hysterectomy
Skin Tags Removal
Tubal Surgery
Vaccine Administration
Vaginal Delivery
Conditions:
Abnormal Vaginal Bleeding
Breast Disorders
Complicating Pregnancy or Childbirth
Endometriosis
Genital HPV
Languages:
English
Spanish
Description:
Dr. Huynh graduated from the Virginia Commonwealth University SOM in 2004. She works in Louisville, CO and 1 other location and specializes in Obstetrics & Gynecology. Dr. Huynh is affiliated with Avista Adventist Hospital.
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Long Huynh

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Specialties:
Orthopaedic Surgery
Work:
Texas Orthopaedics & Sports Medicine
13603 Michel Rd, Tomball, TX 77375
(281) 547-0986 (phone), (281) 351-2515 (fax)
Languages:
English
Description:
Mr. Huynh works in Tomball, TX and specializes in Orthopaedic Surgery. Mr. Huynh is affiliated with Memorial Hermann The Woodlands Hospital and Tomball Regional Medical Center.

Resumes

Resumes

Long Huynh Photo 3

Long Huynh Hercules, CA

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Work:
Bank of America

2010 to 2000
Business Control Analyst-Treasury special actions
Bank of America

2007 to 2010
Senior Client Fulfillment Analyst
Sports Authority
Concord, CA
2000 to 2006
Lead Customer Service- Management
Education:
California State University Eastbay
Hayward, CA
2004 to 2006
Bachelor of Science in Business Administration
Diablo Valley College
Pleasant Hill, CA
2000 to 2004
Associate in Arts in General Education
Long Huynh Photo 4

Long Huynh Hercules, CA

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Work:
Bank of America

Feb 2007 to Present
Business Control Analyst
Bank of America
Concord, CA
Feb 2007 to Nov 2010
Senior Client Fulfillment Analyst
Sports Authority
Concord, CA
Nov 2000 to Jan 2007
Lead Customer Service
Education:
CSU East Bay
Hayward, CA
2004 to 2006
BS in Business Administration in Finance

Business Records

Name / Title
Company / Classification
Phones & Addresses
Long Huynh
LONG HUYNH, INC

Publications

Us Patents

Programming Language Translator And Enabling Translation Of Machine-Centric Commands For Controlling Instrument

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US Patent:
8572589, Oct 29, 2013
Filed:
Jun 30, 2009
Appl. No.:
12/495300
Inventors:
James Adam Cataldo - Saratoga CA, US
Long Bill Huynh - Daly City CA, US
Stanley T. Jefferson - Palo Alto CA, US
Assignee:
Agilent Technologies, Inc. - Santa Clara CA
International Classification:
G06F 9/44
US Classification:
717140, 717125, 717141
Abstract:
A computer readable medium stores a program, executable by a computer, for enabling translation of machine-centric commands in an instrument protocol to a programming language for controlling an instrument configured to use the machine-centric commands. The computer readable medium includes an identifying code segment for identifying instrument protocol commands executable by the instrument, and a generating code segment generates methods corresponding to the instrument protocol commands, each method including programming language source code or compiled machine code for executing the corresponding instrument protocol command. A storing code segment stores the methods in a program library associated with the instrument, the program library enabling selection of at least one method by a programming language program that controls the instrument, in order to execute the instrument protocol command corresponding to the selected method.

System And Method For Interactive Instrument Operation And Automation

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US Patent:
20100281412, Nov 4, 2010
Filed:
Apr 30, 2009
Appl. No.:
12/432959
Inventors:
James Adam CATALDO - Saratoga CA, US
Long Bill HUYNH - Daly City CA, US
Stanley T. JEFFERSON - Palo Alto CA, US
Assignee:
AGILENT TECHNOLOGIES, INC. - Loveland CO
International Classification:
G06F 3/048
G06F 11/07
G06F 17/30
US Classification:
715771, 714 57, 707E17001, 714E11025
Abstract:
A system and method: provide a user interface to a user, the user interface including one or more objects representing a corresponding one or more instruments that are connected to the system; receive from a user a selection of one of the one or more instruments, made via the user interface; obtaining at the computer a file that describes commands to which the selected instrument responds; and present to the user via the user interface an indication of the commands to which the selected instrument responds.

Fan-Out Wafer-Level Packaging Using Metal Foil Lamination

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US Patent:
20170170031, Jun 15, 2017
Filed:
Feb 27, 2017
Appl. No.:
15/443371
Inventors:
- San Jose CA, US
Rajesh Katkar - San Jose CA, US
Long Huynh - Santa Clara CA, US
Laura Wills Mirkarimi - Sunol CA, US
Bongsub Lee - Mountain View CA, US
Gabriel Z. Guevara - San Jose CA, US
Tu Tam Vu - San Jose CA, US
Kyong-Mo Bang - Fremont CA, US
Akash Agrawal - San Jose CA, US
Assignee:
Invensas Corporation - San Jose CA
International Classification:
H01L 21/56
H01L 21/683
H01L 21/768
H01L 25/00
H01L 21/304
H01L 23/29
H01L 25/065
H01L 21/02
H01L 23/00
Abstract:
Fan-out wafer-level packaging (WLP) using metal foil lamination is provided. An example wafer-level package incorporates a metal foil, such as copper (Cu), to relocate bonding pads in lieu of a conventional deposited or plated RDL. A polymer such as an epoxy layer adheres the metal foil to the package creating conductive contacts between the metal foil and metal pillars of a die. The metal foil may be patterned at different stages of a fabrication process. An example wafer-level package with metal foil provides relatively inexpensive electroplating-free traces that replace expensive RDL processes. Example techniques can reduce interfacial stress at fan-out areas to enhance package reliability, and enable smaller chips to be used. The metal foil provides improved fidelity of high frequency signals. The metal foil can be bonded to metallic pillar bumps before molding, resulting in less impact on the mold material.

Fan-Out Wafer-Level Packaging Using Metal Foil Lamination

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US Patent:
20170103957, Apr 13, 2017
Filed:
Oct 7, 2015
Appl. No.:
14/877205
Inventors:
- San Jose CA, US
Rajesh Katkar - San Jose CA, US
Long Huynh - Santa Clara CA, US
Laura Wills Mirkarimi - Sunol CA, US
Bongsub Lee - Mountain View CA, US
Gabriel Z. Guevara - San Jose CA, US
Tu Tam Vu - San Jose CA, US
Kyong-Mo Bang - Fremont CA, US
Akash Agrawal - San Jose CA, US
Assignee:
Invensas Corporation - San Jose CA
International Classification:
H01L 23/00
H01L 21/683
H01L 23/29
H01L 21/56
H01L 21/304
H01L 23/538
H01L 21/02
H01L 21/768
Abstract:
Fan-out wafer-level packaging (WLP) using metal foil lamination is provided. An example wafer-level package incorporates a metal foil, such as copper (Cu), to relocate bonding pads in lieu of a conventional deposited or plated RDL. A polymer such as an epoxy layer adheres the metal foil to the package creating conductive contacts between the metal foil and metal pillars of a die. The metal foil may be patterned at different stages of a fabrication process. An example wafer-level package with metal foil provides relatively inexpensive electroplating-free traces that replace expensive RDL processes. Example techniques can reduce interfacial stress at fan-out areas to enhance package reliability, and enable smaller chips to be used. The metal foil provides improved fidelity of high frequency signals. The metal foil can be bonded to metallic pillar bumps before molding, resulting in less impact on the mold material.

Wafer-Level Packaging Using Wire Bond Wires In Place Of A Redistribution Layer

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US Patent:
20170069591, Mar 9, 2017
Filed:
Nov 21, 2016
Appl. No.:
15/357553
Inventors:
- San Jose CA, US
Tu Tam Vu - San Jose CA, US
Bongsub Lee - Mountain View CA, US
Kyong-Mo Bang - Fremont CA, US
Xuan Li - Santa Clara CA, US
Long Huynh - Santa Clara CA, US
Gabriel Z. Guevara - San Jose CA, US
Akash Agrawal - San Jose CA, US
Willmar Subido - San Jose CA, US
Laura Wills Mirkarimi - Sunol CA, US
Assignee:
Invensas Corporation - San Jose CA
International Classification:
H01L 23/00
H01L 25/065
H01L 21/78
H01L 25/10
H01L 23/31
H01L 21/56
Abstract:
An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.

Wafer-Level Packaging Using Wire Bond Wires In Place Of A Redistribution Layer

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US Patent:
20160322326, Nov 3, 2016
Filed:
Apr 30, 2015
Appl. No.:
14/701049
Inventors:
- San Jose CA, US
Tu Tam VU - San Jose CA, US
Bongsub LEE - Mountain View CA, US
Kyong-Mo BANG - Fremont CA, US
Xuan LI - Santa Clara CA, US
Long HUYNH - Santa Clara CA, US
Gabriel Z. GUEVARA - San Jose CA, US
Akash AGRAWAL - San Jose CA, US
Willmar SUBIDO - Garland TX, US
Laura Wills MIRKARIMI - Sunol CA, US
Assignee:
INVENSAS CORPORATION - San Jose CA
International Classification:
H01L 23/00
H01L 21/78
H01L 21/56
H01L 23/31
H01L 25/065
Abstract:
An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.
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Long B Huynh from San Jose, CA Get Report