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Satish Gunturi

from Schenectady, NY
Age ~52
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Also known as:
Sivarama Gunturi
Related to:
Prasanna Gunturi, 51
Connected to:
Nivedita Gunturi, 40Sudha K Gunturu, 40Vamshee K Gunturu, 47Jeff A Gunty, 65Kurt Gunty, 59Robert N Gunty, 44Austin W Guntz, 34Christopher A Guntz, 35Craig A Guntz, 68Frank A Guntz, 70

Satish Gunturi Phones & Addresses

  • Schenectady, NY
  • 406 Shaker Rd, Albany, NY 12205 (518) 250-4500

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Satish Gunturi Photo 1

Satish Gunturi

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Location:
Albany, New York Area
Industry:
Electrical/Electronic Manufacturing

Publications

Us Patents

Integral Heat Sink With Spiral Manifolds

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US Patent:
8120915, Feb 21, 2012
Filed:
Aug 23, 2010
Appl. No.:
12/861181
Inventors:
Adam Gregory Pautsch - Rexford NY, US
Satish Sivarama Gunturi - Albany NY, US
Patrick Jose Lazatin - Glenville NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H05K 7/20
US Classification:
361699, 257714, 174 151, 165 804, 16510433
Abstract:
A heat sink is provided for directly cooling at least one electronic device package having an upper contact surface and a lower contact surface. The heat sink comprises a cooling piece formed of at least one thermally conductive material, where the cooling piece defines at least one inlet manifold configured to receive a coolant and at least one outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved and are disposed in a spiral arrangement. The cooling piece further defines a number of millichannels disposed in a radial arrangement and configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The millichannels and inlet and outlet manifolds are further configured to directly cool one of the upper and lower contact surface of the electronic device package by direct contact with the coolant, such that the heat sink comprises an integral heat sink.

Heat Sinks With C-Shaped Manifolds And Millichannel Cooling

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US Patent:
8218320, Jul 10, 2012
Filed:
Jun 29, 2010
Appl. No.:
12/826016
Inventors:
Adam Gregory Pautsch - Rexford NY, US
Satish Sivarama Gunturi - Albany NY, US
Patrick Jose Lazatin - Glenville NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H05K 7/20
F28F 7/00
H01L 23/34
US Classification:
361699, 165 802, 165 804, 257714
Abstract:
A heat sink for cooling at least one electronic device package includes a lower lid, an upper lid, and a body formed of at least one thermally conductive material. The body is disposed between and sealed to the lower and upper lids and defines a tapered inlet distribution chamber configured to receive a coolant, C-shaped inlet manifolds configured to receive the coolant from the tapered inlet distribution chamber, inverted C-shaped outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved and disposed in a circular arrangement. The outlet manifolds extend around only a portion of the body and terminate adjacent to opposing sides of the inlet chamber. The body further defines a tapered outlet chamber configured to receive the coolant from the outlet manifolds, where the inlet manifolds extend around only a portion of the body and terminate adjacent to opposing sides of the tapered outlet chamber. Millichannels are formed in the body or are formed in at least one of the lids and are configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds.

Press-Pack Module With Power Overlay Interconnection

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US Patent:
8531027, Sep 10, 2013
Filed:
Apr 30, 2010
Appl. No.:
12/771892
Inventors:
Arun Virupaksha Gowda - Niskayuna NY, US
Ahmed Elasser - Niskayuna NY, US
Satish Sivarama Gunturi - Niskayuna NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H01L 23/34
US Classification:
257726, 257785, 257E23169
Abstract:
Systems and methods for utilizing power overlay (POL) technology and semiconductor press-pack technology to produce semiconductor packages with higher reliability and power density are provided. A POL structure may interconnect semiconductor devices within a semiconductor package, and certain embodiments may be implemented to reduce the probability of damaging the semiconductor devices during the pressing of the conductive plates. In one embodiment, springs and/or spacers may be used to reduce or control the force applied by an emitter plate onto the semiconductor devices in the package. In another embodiment, the emitter plate may be recessed to exert force on the POL structure, rather than directly against the semiconductor devices. Further, in some embodiments, the conductive layer of the POL structure may be grown to function as an emitter plate, and regions of the conductive layer may be made porous to provide compliance.

Method For Bonding Electronic Components

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US Patent:
20080283579, Nov 20, 2008
Filed:
May 1, 2008
Appl. No.:
12/149410
Inventors:
Satish Gunturi - Albany NY, US
Raymond Zehringer - Muttenz, CH
Wolfgang Knapp - Lenzburg, CH
Assignee:
ABB Research Ltd - Zurich
International Classification:
B23K 31/02
US Classification:
228121
Abstract:
A first electronic component, e.g., a semiconductor die and a second electronic component, e.g., a substrate, each with a main surface, are bonded to each other by applying at least one metal layer comprising an indium layer on each of the main surfaces. Then the semiconductor die and the substrate are aligned against each other with their main surfaces facing each other. The die and substrate with the metal layers in between form an arrangement, which is introduced into a compression means. Afterwards the arrangement is compressed in the compression means at a pressure in a range of 10 to 35 MPa, and heat in a range of 230 to 275 C. is applied to the arrangement, by which temperature and pressure the electronic components are bonded to each other. The compression process is performable in oxygeneous gas atmosphere inside the compression means.

Heat Sink And Cooling And Packaging Stack For Press-Packages

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US Patent:
20100038058, Feb 18, 2010
Filed:
Aug 18, 2008
Appl. No.:
12/193441
Inventors:
Satish Sivarama Gunturi - Albany NY, US
Mahadevan Balasubramaniam - Ballston Lake NY, US
Ramakrishna Venkata Mallina - Clifton Park NY, US
Richard Alfred Beaupre - Pittsfield MA, US
Le Yan - Schenectady NY, US
Richard S. Zhang - Rexford NY, US
Ljubisa Dragoljub Stevanovic - Clifton Park NY, US
Adam Gregory Pautsch - Rexford NY, US
Stephen Adam Solovitz - Portland OR, US
Assignee:
GENERAL ELECTRIC COMPANY - SCHENECTADY NY
International Classification:
F28F 7/00
US Classification:
165 804
Abstract:
A heat sink for directly cooling at least one electronic device package is provided. The electronic device package has an upper contact surface and a lower contact surface. The heat sink comprises a cooling piece formed of at least one thermally conductive material. The cooling piece defines multiple inlet manifolds configured to receive a coolant and multiple outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved. The cooling piece further defines multiple millichannels configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The millichannels and inlet and outlet manifolds are further configured to directly cool one of the upper and lower contact surface of the electronic device package by direct contact with the coolant, such that the heat sink comprises an integral heat sink.

Method Of Joining Materials, And Articles Made Therewith

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US Patent:
20110135956, Jun 9, 2011
Filed:
Dec 8, 2009
Appl. No.:
12/632852
Inventors:
Satish Sivarama Gunturi - Albany NY, US
Kristopher John Frutschy - Clifton Park NY, US
Dalong Zhong - Niskayuna NY, US
Xi Zhang - Ballston Lake NY, US
Assignee:
GENERAL ELECTRIC COMPANY - SCHENECTADY NY
International Classification:
B32B 15/01
B29C 65/00
B23K 31/02
B29C 65/02
US Classification:
428660, 156 60, 228175
Abstract:
A method of joining a first component and a second component is provided. The first component has a surface that comprises at least about 75% by volume of a refractory metal. The second component has a coefficient of thermal expansion greater than a coefficient of thermal expansion of the first component. The method includes disposing a coating on the surface of the first component. The coating includes an adhesion layer and a wetting layer disposed over the adhesion layer. The method further includes disposing a bonding material between the first and second components and joining them. The bonding material has a melting temperature lower than a melting temperature of the second component. An article made using the method is also presented.

Heat Sinks With Millichannel Cooling

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US Patent:
20110317369, Dec 29, 2011
Filed:
Jun 29, 2010
Appl. No.:
12/826128
Inventors:
Adam Gregory Pautsch - Rexford NY, US
Satish Sivarama Gunturi - Albany NY, US
Patrick Jose Lazatin - Glenville NY, US
Assignee:
GENERAL ELECTRIC COMPANY - SCHENECTADY NY
International Classification:
H05K 7/20
US Classification:
361702
Abstract:
A heat sink for cooling at least one electronic device package includes a lower lid, an upper lid and a body formed of at least one thermally conductive material. The body is disposed between and sealed to the lower and upper lids and defines inlet manifolds configured to receive a coolant and outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved and are disposed in a circular or spiral arrangement. Millichannels are formed in the body or in the lids, are disposed in a radial arrangement, and are configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The millichannels and inlet and outlet manifolds are further configured to cool one of the upper and lower contact surfaces of the electronic device package. Heat sinks with a single lid are also provided.

Remote Load Bypass System

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US Patent:
20130313906, Nov 28, 2013
Filed:
May 23, 2012
Appl. No.:
13/478310
Inventors:
Ranjan Kumar Gupta - Schenectady NY, US
Christof Martin Sihler - Hallbergmoos, DE
Satish Sivarama Gunturi - Albany NY, US
Stefan Schroeder - Munich, DE
Joseph Song Manguelle - Houston TX, US
Ravisekhar Nadimpalli Raju - Clifton Park NY, US
Rajib Datta - Niskayuna NY, US
Assignee:
GENERAL ELECTRIC COMPANY - SCHENECTADY NY
International Classification:
H02H 3/20
H02J 1/00
US Classification:
307 39, 307130
Abstract:
A load bypass switch enables continuous power to remote loads in the event of 1) failure of one or more remote loads, or 2) faults within the remote loads, within a dc power system. The bypass switch utilizes the passive components of the dc loads or inverters and therefore reduces overall component count. A black start method for the remote dc system uses the same passives present inside the loads/inverters and simultaneously uses some of the features of the bypass switch. A bypass-module-yard uses multiple bypass switches enabling continuous power to the remote loads in the event of failure of one or more power distribution cables (in-feed to the remote loads) located remotely in the dc system.
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Satish Gunturi from Schenectady, NY, age ~52 Get Report