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Christy Hagerty Phones & Addresses

  • Haymarket, VA
  • Ashburn, VA
  • Alexandria, VA
  • Waldorf, MD
  • Tucson, AZ
  • Fort Bragg, NC
  • Duluth, MN

Work

Company: Bae systems information technology Jan 2013 to May 2013 Address: Manassas, VA Position: Deputy program manager

Education

Degree: Master of Science in Technology Management School / High School: George Mason University 2012 to 2014 Specialities: Technical Business Management

Skills

AutoCAD • Microsoft Office • Marketing • Microsoft Excel • Microsoft Word • Photoshop • Teamwork • PowerPoint • Editing • Project Management • Outlook • Leadership • Technical Writing • Customer Service • Engineering • Analysis • Project Planning

Industries

Defense & Space

Resumes

Resumes

Christy Hagerty Photo 1

Deputy Program Manager

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Location:
Manassas, Virginia
Industry:
Defense & Space
Work:
BAE Systems Information Technology - Manassas, VA Jan 2013 - Apr 2013
Deputy Program Manager

BAE Systems Information Technology - Manassas, VA Nov 2010 - Jan 2013
Space Electronics Circuit Card Assembly Process Engineer

BAE Systems Information Technology - Manassas, VA Feb 2006 - Nov 2010
Space Electronics Package Design & Process Engineer
Education:
George Mason University 2012 - 2014
Master of Science in Technology Management, Technical Business Management
University of Maryland College Park 2003 - 2006
Bachelor of Science in Mechanical Engineering
Skills:
AutoCAD
Microsoft Office
Marketing
Microsoft Excel
Microsoft Word
Photoshop
Teamwork
PowerPoint
Editing
Project Management
Outlook
Leadership
Technical Writing
Customer Service
Engineering
Analysis
Project Planning

Publications

Us Patents

Isostress Grid Array And Method Of Fabrication Thereof

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US Patent:
8586417, Nov 19, 2013
Filed:
Jul 26, 2013
Appl. No.:
13/951502
Inventors:
Christy A. Hagerty - Haymarket VA,
Santos Nazario-Camacho - Woodbridge VA,
Keith K. Sturcken - Nokesville VA,
Assignee:
BAE Systems Information and Electronic Systems Integration Inc. - Nashua NH
International Classification:
H01L 23/49
US Classification:
438121, 438611, 438123, 438617, 257E23024, 257696
Abstract:
An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate. The non-uniformity of length in the wire columns reduces stress in the package leads after attachment of the package to a carrier substrate, such as a printed circuit board.

Isostress Grid Array And Method Of Fabrication Thereof

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US Patent:
20110074009, Mar 31, 2011
Filed:
Sep 29, 2010
Appl. No.:
12/923581
Inventors:
John A. Hughes - Falls Church VA,
Christy A. Hagerty - Haymarket VA,
Santos Nazario-Camacho - Woodbridge VA,
Keith K. Sturcken - Nokesville VA,
Assignee:
BAE Systems Information & Electronic Systems Integration Inc. - Nashua NH
International Classification:
H01L 23/49
H01L 21/60
US Classification:
257697, 438121, 257E23024, 257E21506
Abstract:
An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate. The non-uniformity of length in the wire columns reduces stress in the package leads after attachment of the package to a carrier substrate, such as a printed circuit board.

Method For Fabricating Solder Columns For A Column Grid Array Package

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US Patent:
20140015098, Jan 16, 2014
Filed:
Jul 12, 2012
Appl. No.:
13/547518
Inventors:
THOMAS J. McINTYRE - NOKESVILLE VA,
KEITH K. STURCKEN - NOKESVILLE VA,
CHRISTY A. HAGERTY - HAYMARKET VA,
Assignee:
BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC. - NASHUA NH
International Classification:
H01L 27/08
B23K 31/02
US Classification:
257532, 228256, 257E27048
Abstract:
A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.
Christy A Hagerty from Haymarket, VA, age ~45 Get Report